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authorMartin Roth <martinroth@google.com>2017-06-24 21:53:37 -0600
committerMartin Roth <martinroth@google.com>2017-07-06 00:19:56 +0000
commit356b519049e6d40e15b2e4a85cae654e2e8df8ba (patch)
tree734c42399af1d7ee2f25588e2bd962922e514f0a /src/mainboard/intel
parentf95911ad3765c0f94db241b0c95a6c0a8c608077 (diff)
downloadcoreboot-356b519049e6d40e15b2e4a85cae654e2e8df8ba.tar.xz
mainboard/[g-l]: add IS_ENABLED() around Kconfig symbol references
Change-Id: I1f906c8c465108017bc4d08534653233078ef32d Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20343 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/baskingridge/acpi_tables.c2
-rw-r--r--src/mainboard/intel/bayleybay_fsp/mainboard.c2
-rw-r--r--src/mainboard/intel/camelbackmountain_fsp/mainboard.c2
-rw-r--r--src/mainboard/intel/cougar_canyon2/romstage.c4
-rw-r--r--src/mainboard/intel/eagleheights/fadt.c2
5 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/intel/baskingridge/acpi_tables.c b/src/mainboard/intel/baskingridge/acpi_tables.c
index a532ab0057..e3a52faf1b 100644
--- a/src/mainboard/intel/baskingridge/acpi_tables.c
+++ b/src/mainboard/intel/baskingridge/acpi_tables.c
@@ -74,7 +74,7 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
gnvs->tpmp = 1;
-#if CONFIG_CHROMEOS
+#if IS_ENABLED(CONFIG_CHROMEOS)
/* Emerald Lake has no EC (?) */
gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO;
#endif
diff --git a/src/mainboard/intel/bayleybay_fsp/mainboard.c b/src/mainboard/intel/bayleybay_fsp/mainboard.c
index 67bee3973b..ea57c93832 100644
--- a/src/mainboard/intel/bayleybay_fsp/mainboard.c
+++ b/src/mainboard/intel/bayleybay_fsp/mainboard.c
@@ -21,7 +21,7 @@
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <console/console.h>
-#if CONFIG_VGA_ROM_RUN
+#if IS_ENABLED(CONFIG_VGA_ROM_RUN)
#include <x86emu/x86emu.h>
#endif
#include <pc80/mc146818rtc.h>
diff --git a/src/mainboard/intel/camelbackmountain_fsp/mainboard.c b/src/mainboard/intel/camelbackmountain_fsp/mainboard.c
index 58da0361d8..393fad8d58 100644
--- a/src/mainboard/intel/camelbackmountain_fsp/mainboard.c
+++ b/src/mainboard/intel/camelbackmountain_fsp/mainboard.c
@@ -21,7 +21,7 @@
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <console/console.h>
-#if CONFIG_VGA_ROM_RUN
+#if IS_ENABLED(CONFIG_VGA_ROM_RUN)
#include <x86emu/x86emu.h>
#endif
#include <pc80/mc146818rtc.h>
diff --git a/src/mainboard/intel/cougar_canyon2/romstage.c b/src/mainboard/intel/cougar_canyon2/romstage.c
index bf5b738754..96c22ea367 100644
--- a/src/mainboard/intel/cougar_canyon2/romstage.c
+++ b/src/mainboard/intel/cougar_canyon2/romstage.c
@@ -213,7 +213,7 @@ void main(FSP_INFO_HEADER *fsp_info_header)
pm1_cnt = inl(DEFAULT_PMBASE + PM1_CNT);
post_code(0x46);
if ((pm1_sts & WAK_STS) && ((pm1_cnt >> 10) & 7) == 5) {
-#if CONFIG_HAVE_ACPI_RESUME
+#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
printk(BIOS_DEBUG, "Resume from S3 detected.\n");
boot_mode = 2;
/* Clear SLP_TYPE. This will break stage2 but
@@ -261,7 +261,7 @@ void romstage_main_continue(EFI_STATUS status, VOID *HobListPtr) {
post_code(0x49);
-#if CONFIG_USBDEBUG
+#if IS_ENABLED(CONFIG_USBDEBUG)
/* FSP reconfigures USB, so reinit it to have debug */
early_usbdebug_init();
#endif
diff --git a/src/mainboard/intel/eagleheights/fadt.c b/src/mainboard/intel/eagleheights/fadt.c
index 7d0e8a32b6..eaea7f71e3 100644
--- a/src/mainboard/intel/eagleheights/fadt.c
+++ b/src/mainboard/intel/eagleheights/fadt.c
@@ -62,7 +62,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
fadt->dsdt = (unsigned long) dsdt;
fadt->preferred_pm_profile = 7; /* Performance Server */
fadt->sci_int = 0x9;
-#if CONFIG_HAVE_SMI_HANDLER
+#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
fadt->smi_cmd = APM_CNT;
#else
fadt->smi_cmd = 0x00;