Re-integrate "USE_OPTION_TABLE" code.

Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

13 files changed, 9 insertions, 26 deletions

diff --git a/src/mainboard/intel/d810e2cb/Kconfig b/src/mainboard/intel/d810e2cb/Kconfig
index a74d374840..4df00c9662 100644
--- a/src/mainboard/intel/d810e2cb/Kconfig
+++ b/src/mainboard/intel/d810e2cb/Kconfig
@@ -40,11 +40,6 @@ config MAINBOARD_PART_NUMBER
 	default "D810E2CB"
 	depends on BOARD_INTEL_D810E2CB
 
-config HAVE_OPTION_TABLE
-	bool
-	default n
-	depends on BOARD_INTEL_D810E2CB
-
 config IRQ_SLOT_COUNT
 	int
 	default 7
diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig
index b9c396da61..61b7340dbf 100644
--- a/src/mainboard/intel/d945gclf/Kconfig
+++ b/src/mainboard/intel/d945gclf/Kconfig
@@ -29,6 +29,7 @@ config BOARD_INTEL_D945GCLF
 	select GENERATE_ACPI_TABLES
 	select GENERATE_PIRQ_TABLE
 	select GENERATE_MP_TABLE
+	select HAVE_OPTION_TABLE
 	select HAVE_HARD_RESET
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index 6f32fe5f86..43681a2d14 100644
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -33,8 +33,7 @@
 
 #include "superio/smsc/lpc47m15x/lpc47m15x.h"
 
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include <cpu/x86/bist.h>
diff --git a/src/mainboard/intel/eagleheights/Kconfig b/src/mainboard/intel/eagleheights/Kconfig
index d04e79eafe..dbb7d164e9 100644
--- a/src/mainboard/intel/eagleheights/Kconfig
+++ b/src/mainboard/intel/eagleheights/Kconfig
@@ -6,6 +6,7 @@ config BOARD_INTEL_EAGLEHEIGHTS
 	select SOUTHBRIDGE_INTEL_I3100
 	select SUPERIO_INTEL_I3100
 	select SUPERIO_SMSC_SMSCSUPERIO
+	select HAVE_OPTION_TABLE
 	select HAVE_HARD_RESET
 	select BOARD_HAS_HARD_RESET
 	select BOARD_HAS_FADT
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index cc6966b074..1d7c8d5028 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -29,8 +29,7 @@
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
 #include <cpu/x86/bist.h>
diff --git a/src/mainboard/intel/jarrell/Kconfig b/src/mainboard/intel/jarrell/Kconfig
index e5d5314f97..aef112c9ba 100644
--- a/src/mainboard/intel/jarrell/Kconfig
+++ b/src/mainboard/intel/jarrell/Kconfig
@@ -9,6 +9,7 @@ config BOARD_INTEL_JARRELL
 	select ROMCC
 	select HAVE_HARD_RESET
 	select BOARD_HAS_HARD_RESET
+	select HAVE_OPTION_TABLE
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
 	select UDELAY_TSC
diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index b6e74fac08..1caf4b9548 100644
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -5,8 +5,7 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
diff --git a/src/mainboard/intel/mtarvon/Kconfig b/src/mainboard/intel/mtarvon/Kconfig
index cea70b1054..ce9d9a4f0c 100644
--- a/src/mainboard/intel/mtarvon/Kconfig
+++ b/src/mainboard/intel/mtarvon/Kconfig
@@ -22,11 +22,6 @@ config MAINBOARD_PART_NUMBER
 	default "3100 devkit (Mt. Arvon)"
 	depends on BOARD_INTEL_MTARVON
 
-config HAVE_OPTION_TABLE
-	bool
-	default n
-	depends on BOARD_INTEL_MTARVON
-
 config IRQ_SLOT_COUNT
 	int
 	default 1
diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index 51df42d9f5..6d9d92f764 100644
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -26,7 +26,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i3100/i3100_early_smbus.c"
diff --git a/src/mainboard/intel/truxton/Kconfig b/src/mainboard/intel/truxton/Kconfig
index 5a382d3088..6b7a220614 100644
--- a/src/mainboard/intel/truxton/Kconfig
+++ b/src/mainboard/intel/truxton/Kconfig
@@ -23,11 +23,6 @@ config MAINBOARD_PART_NUMBER
 	default "Truxton"
 	depends on BOARD_INTEL_TRUXTON
 
-config HAVE_OPTION_TABLE
-	bool
-	default n
-	depends on BOARD_INTEL_TRUXTON
-
 config IRQ_SLOT_COUNT
 	int
 	default 1
diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index 3cbeeda63d..1a02f856ad 100644
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -26,7 +26,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include "pc80/udelay_io.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
diff --git a/src/mainboard/intel/xe7501devkit/Kconfig b/src/mainboard/intel/xe7501devkit/Kconfig
index a83c1bc0ca..5ce7021cf8 100644
--- a/src/mainboard/intel/xe7501devkit/Kconfig
+++ b/src/mainboard/intel/xe7501devkit/Kconfig
@@ -12,7 +12,6 @@ config BOARD_INTEL_XE7501DEVKIT
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
 	select UDELAY_TSC
-	select HAVE_OPTION_TABLE
 	select HAVE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_2048
 
diff --git a/src/mainboard/intel/xe7501devkit/romstage.c b/src/mainboard/intel/xe7501devkit/romstage.c
index af96a09a48..c04d63790c 100644
--- a/src/mainboard/intel/xe7501devkit/romstage.c
+++ b/src/mainboard/intel/xe7501devkit/romstage.c
@@ -6,8 +6,7 @@
 #include <cpu/x86/lapic.h>
 #include <arch/cpu.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801cx/i82801cx_early_smbus.c"