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| author | Angel Pons <th3fanbus@gmail.com> | 2020-01-01 18:05:08 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-01-10 14:49:12 +0000 |
| commit | 118b18e63af881bc4f1c03914431b2c07c837285 (patch) | |
| tree | 8b973b98ee17db8e0745ba81ea6dc937f7e11e31 /src/mainboard/intel | |
| parent | 9f363fc85aef290d20f7102a16af0df274beadd8 (diff) | |
| download | coreboot-118b18e63af881bc4f1c03914431b2c07c837285.tar.xz | |
mb/**/devicetree.cb: Remove untrue comments
Even if they were corrected, they just rephrase the code.
Change-Id: Iebc4e8c9eb0f44f84acf532ad12a5d064075a102
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38047
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/saddlebrook/devicetree.cb | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb index 7d7b58bd34..5d69e52740 100644 --- a/src/mainboard/intel/saddlebrook/devicetree.cb +++ b/src/mainboard/intel/saddlebrook/devicetree.cb @@ -15,7 +15,6 @@ chip soc/intel/skylake - # Enable deep Sx states register "deep_s5_enable_ac" = "0" register "deep_s5_enable_dc" = "0" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" |