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| author | Aaron Durbin <adurbin@chromium.org> | 2012-11-29 17:21:51 -0600 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-03-14 05:08:02 +0100 |
| commit | 30c3900451756793144bb579acc59205381138ab (patch) | |
| tree | 2fae98a6a3e936c12abb5847d34ac23835da66a6 /src/mainboard/intel | |
| parent | 8256a9b715df14dc8914b641796344ac513cb889 (diff) | |
| download | coreboot-30c3900451756793144bb579acc59205381138ab.tar.xz | |
haswell: notes and updates.
Add a FIXME about checking a MCHBAR register that isn't setup yet.
Also, remove revision updating because I can't find anything in the
docs that suggest this is required for haswell.
Change-Id: Ia8a6e08f82e18789e31c6c2ec2c1d63740c18dc4
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2631
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/graysreef/romstage.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/intel/graysreef/romstage.c b/src/mainboard/intel/graysreef/romstage.c index da839f41c8..bc29c0a1f2 100644 --- a/src/mainboard/intel/graysreef/romstage.c +++ b/src/mainboard/intel/graysreef/romstage.c @@ -193,6 +193,10 @@ void main(unsigned long bist) /* Halt if there was a built in self test failure */ report_bist_failure(bist); + /* + * FIXME: MCHBAR isn't setup yet. It's setup in + * haswell_early_initialization(). + */ if (MCHBAR16(SSKPD) == 0xCAFE) { printk(BIOS_DEBUG, "soft reset detected\n"); boot_mode = 1; |