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authorAaron Durbin <adurbin@chromium.org>2013-05-07 11:05:06 -0500
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2013-11-24 16:08:39 +0100
commit5b4178575f65715c168989bf3e0719d99fccd366 (patch)
tree3cfee0b4796f48153d252c2021e86fd62ad94d21 /src/mainboard/intel
parent8e0cd496a15b1e20571806468e7d2a9a5b1c9890 (diff)
downloadcoreboot-5b4178575f65715c168989bf3e0719d99fccd366.tar.xz
haswell: split microcode between ULT and non-ULT
The current microcode blobs contain both ULT and non-ULT revisions. Only include one or the other based off of the CONFIG_INTEL_LYNXPOINT_LP Kconfig option. Change-Id: I3e4e41d4cd727b1a974361fb469267e6f6022d5a Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/50318 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/4160 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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