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authorStefan Reinauer <stefan.reinauer@coreboot.org>2011-04-15 00:19:27 +0000
committerStefan Reinauer <stepan@openbios.org>2011-04-15 00:19:27 +0000
commit8345a194ba30051d640c6d0340379b15696ea1a0 (patch)
tree33bd078576167e10cbcee4dd09a879bb3b37ee10 /src/mainboard/intel
parent24ef134b37131064a6f45a221b6478e55f0a38ca (diff)
downloadcoreboot-8345a194ba30051d640c6d0340379b15696ea1a0.tar.xz
fix mainboards that were including earlymtrr.c without actually using it.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6502 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/eagleheights/romstage.c1
-rw-r--r--src/mainboard/intel/mtarvon/romstage.c1
2 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index 1178abf897..aa884c3e38 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -68,7 +68,6 @@ static inline int spd_read_byte(u16 device, u8 address)
}
#include "northbridge/intel/i3100/raminit.h"
-#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/intel/i3100/memory_initialized.c"
#include "northbridge/intel/i3100/raminit.c"
#include "lib/generic_sdram.c"
diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index f1e7676c54..23baced288 100644
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -31,7 +31,6 @@
#include "southbridge/intel/i3100/early_lpc.c"
#include "northbridge/intel/i3100/raminit.h"
#include "superio/intel/i3100/i3100.h"
-#include "cpu/x86/mtrr/earlymtrr.c"
#include "superio/intel/i3100/early_serial.c"
#include "northbridge/intel/i3100/memory_initialized.c"
#include "cpu/x86/bist.h"