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| author | Andrey Petrov <andrey.petrov@intel.com> | 2016-03-18 14:43:00 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-04-13 16:08:25 +0200 |
| commit | e07e13d7fdb52bdec6c23a65d96f8be718649c8b (patch) | |
| tree | 00b0b9e6bea9dd222e80101ad08056e425371fb8 /src/mainboard/intel | |
| parent | 28c78abaf72b591092c7ec586e4e42492f49082e (diff) | |
| download | coreboot-e07e13d7fdb52bdec6c23a65d96f8be718649c8b.tar.xz | |
soc/intel/apollolake: Update platform-specific FSP headers
This updates FSP UPD headers that adds new fields. Importantly
there are new FSPS UPD fields that allow to specify some BARs.
They are needed by FSP SiliconInit API to work properly.
Change-Id: Ie268c57c66b4d8fd6e00835916004058ff05762e
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14217
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/intel')
0 files changed, 0 insertions, 0 deletions