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authorPatrick Georgi <patrick@georgi-clan.de>2012-02-16 19:16:14 +0100
committerPatrick Georgi <patrick@georgi-clan.de>2012-02-22 22:16:15 +0100
commit91bd3068a7c28d429bb7a2581ccee40645c137c9 (patch)
tree70706e7cc3e6a990b16e2553c706d492eeb0b3e6 /src/mainboard/iwave
parentb05bf5bca978a12a5c278bf1fbc90e7f5cff69ae (diff)
downloadcoreboot-91bd3068a7c28d429bb7a2581ccee40645c137c9.tar.xz
ACPI: More ../../.. removal
CPP is ran with src/ as part of its search path, so using <northbridge/...> and the like is safe. Change-Id: I644d60190ac92ef284d5f0b4acf44f7db3c788ee Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/649 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/iwave')
-rw-r--r--src/mainboard/iwave/iWRainbowG6/dsdt.asl8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/iwave/iWRainbowG6/dsdt.asl b/src/mainboard/iwave/iWRainbowG6/dsdt.asl
index f19ffb9043..5bf59a7d89 100644
--- a/src/mainboard/iwave/iWRainbowG6/dsdt.asl
+++ b/src/mainboard/iwave/iWRainbowG6/dsdt.asl
@@ -30,7 +30,7 @@ DefinitionBlock(
#include "acpi/platform.asl"
// global NVS and variables
- #include "../../../southbridge/intel/sch/acpi/globalnvs.asl"
+ #include <southbridge/intel/sch/acpi/globalnvs.asl>
// General Purpose Events
//#include "acpi/gpe.asl"
@@ -40,11 +40,11 @@ DefinitionBlock(
Scope (\_SB) {
Device (PCI0)
{
- #include "../../../northbridge/intel/sch/acpi/sch.asl"
- #include "../../../southbridge/intel/sch/acpi/sch.asl"
+ #include <northbridge/intel/sch/acpi/sch.asl>
+ #include <southbridge/intel/sch/acpi/sch.asl>
}
}
/* Chipset specific sleep states */
- #include "../../../southbridge/intel/sch/acpi/sleepstates.asl"
+ #include <southbridge/intel/sch/acpi/sleepstates.asl>
}