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authorStefan Reinauer <stepan@coresystems.de>2010-03-31 14:47:43 +0000
committerStefan Reinauer <stepan@openbios.org>2010-03-31 14:47:43 +0000
commit64ed2b73451de4b655b3fdda0ff42825a165c317 (patch)
tree0faaae313a9a9edbf8b33f56fc18830ba14aa75f /src/mainboard/iwill/dk8_htx
parent5a1f5970857a5ad1fda0cf9d5945192408bf537b (diff)
downloadcoreboot-64ed2b73451de4b655b3fdda0ff42825a165c317.tar.xz
Drop \r\n and \n\r as both print_XXX and printk now do this internally.
Only some assembler files still have \r\n ... Can we move that part to C completely? Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5342 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/iwill/dk8_htx')
-rw-r--r--src/mainboard/iwill/dk8_htx/romstage.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c
index fec1020dba..da0cc57af7 100644
--- a/src/mainboard/iwill/dk8_htx/romstage.c
+++ b/src/mainboard/iwill/dk8_htx/romstage.c
@@ -167,7 +167,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
setup_mb_resource_map();
- print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n");
+ print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
#if CONFIG_MEM_TRAIN_SEQ == 1
set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
@@ -193,7 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
msr_t msr;
msr=rdmsr(0xc0010042);
- print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n");
+ print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
}
@@ -207,7 +207,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
msr_t msr;
msr=rdmsr(0xc0010042);
- print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n");
+ print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
}
#endif
@@ -217,7 +217,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
// fidvid change will issue one LDTSTOP and the HT change will be effective too
if (needs_reset) {
- print_info("ht reset -\r\n");
+ print_info("ht reset -\n");
soft_reset_x(sysinfo->sbbusn, sysinfo->sbdn);
}