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authorPaul Menzel <paulepanter@users.sourceforge.net>2014-02-02 22:05:48 +0100
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-02-12 02:27:07 +0100
commit4549e5a6650b4d4634a46285796e63e31c99f9c8 (patch)
treed3917a209e28bf51a4d64de113b07d90f6b3012f /src/mainboard/iwill/dk8s2
parent090883932386b12fdfb85148041f551be4596f4f (diff)
downloadcoreboot-4549e5a6650b4d4634a46285796e63e31c99f9c8.tar.xz
AMD K8 boards’ `romstage.c`: Spell sync*hr*onize correctly
Change-Id: I92e6e7f1292f66642aa0336064a4eccba104dd08 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/5101 Reviewed-by: Rudolf Marek <r.marek@assembler.cz> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/iwill/dk8s2')
-rw-r--r--src/mainboard/iwill/dk8s2/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c
index abbde20fc5..601c6490f6 100644
--- a/src/mainboard/iwill/dk8s2/romstage.c
+++ b/src/mainboard/iwill/dk8s2/romstage.c
@@ -153,7 +153,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
//do we need apci timer, tsc...., only debug need it for better output
/* all ap stopped? */
- init_timer(); // Need to use TMICT to synconize FID/VID
+ init_timer(); // Need to use TMICT to synchronize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
#if 0