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authorStefan Reinauer <stepan@coresystems.de>2010-03-29 22:08:01 +0000
committerStefan Reinauer <stepan@openbios.org>2010-03-29 22:08:01 +0000
commit798ef2893c44ce3194c539c8c5db33d11e8edbac (patch)
tree405318f804b41070e16ca6b907d65a1e27cc5071 /src/mainboard/iwill/dk8s2
parent72bdfeb6987f9578ac7fee3f21140ab5853d6179 (diff)
downloadcoreboot-798ef2893c44ce3194c539c8c5db33d11e8edbac.tar.xz
This drops the ASSEMBLY define from romstage.c, too
(since it's not assembly code, this was a dirty hack anyways) Also run awk 1 RS= ORS="\n\n" < $FILE > $FILE.nonewlines mv $FILE.nonewlines $FILE on romstage.c because my perl -pi -e 's,#define ASSEMBLY 1,,g' */*/romstage.c cut some holes into the source. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5320 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/iwill/dk8s2')
-rw-r--r--src/mainboard/iwill/dk8s2/romstage.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c
index f04e3eac86..55ba27a09c 100644
--- a/src/mainboard/iwill/dk8s2/romstage.c
+++ b/src/mainboard/iwill/dk8s2/romstage.c
@@ -1,6 +1,3 @@
-#define ASSEMBLY 1
-
-
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
@@ -39,7 +36,6 @@
#include "northbridge/amd/amdk8/raminit.h"
#include "cpu/amd/model_fxx/apic_timer.c"
-
#include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
@@ -117,7 +113,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#define DIMM6 0x56
#define DIMM7 0x57
-
#include "cpu/amd/car/copy_and_run.c"
#include "cpu/amd/car/post_cache_as_ram.c"
@@ -193,7 +188,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* it will set up chains and store link pair for optimization later */
ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
-
#if K8_SET_FIDVID == 1
{
@@ -245,7 +239,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
init_timer(); // Need to use TMICT to synconize FID/VID
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
-
#if 0
dump_pci_devices();
#endif
@@ -253,3 +246,4 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_cache_as_ram(); // bsp swtich stack to ram and copy sysinfo ram now
}
+