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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-02-08 12:20:50 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-02-08 12:20:50 +0000 |
| commit | 38f147ed3d9fdd6bfb23d7226f6fdd3fc5db53d0 (patch) | |
| tree | ecb680abac7c73798a4abf5f5733c6ad3e179bb4 /src/mainboard/iwill | |
| parent | d51eddbb6611965165ad72eb3fb04377a51ab64a (diff) | |
| download | coreboot-38f147ed3d9fdd6bfb23d7226f6fdd3fc5db53d0.tar.xz | |
janitor task: unify and cleanup naming.
cache_as_ram_auto.c and auto.c are both called "romstage.c" now.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/iwill')
| -rw-r--r-- | src/mainboard/iwill/dk8_htx/Makefile.inc | 6 | ||||
| -rw-r--r-- | src/mainboard/iwill/dk8_htx/romstage.c (renamed from src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c) | 0 | ||||
| -rw-r--r-- | src/mainboard/iwill/dk8s2/romstage.c (renamed from src/mainboard/iwill/dk8s2/cache_as_ram_auto.c) | 0 | ||||
| -rw-r--r-- | src/mainboard/iwill/dk8x/romstage.c (renamed from src/mainboard/iwill/dk8x/cache_as_ram_auto.c) | 0 |
4 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/iwill/dk8_htx/Makefile.inc b/src/mainboard/iwill/dk8_htx/Makefile.inc index 1b991e89a7..95af1006cf 100644 --- a/src/mainboard/iwill/dk8_htx/Makefile.inc +++ b/src/mainboard/iwill/dk8_htx/Makefile.inc @@ -44,7 +44,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc crt0s += $(src)/cpu/x86/16bit/reset16.inc crt0s += $(src)/arch/i386/lib/id.inc crt0s += $(src)/cpu/amd/car/cache_as_ram.inc -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc +crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb ldscripts += $(src)/cpu/x86/16bit/entry16.lds @@ -81,8 +81,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/ssdt5.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pc perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' $(obj)/pci5.hex mv $(obj)/pci5.hex $@ -$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h - $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@ +$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h + $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@ perl -e 's/\.rodata/.rom.data/g' -pi $@ perl -e 's/\.text/.section .rom.text/g' -pi $@ diff --git a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c b/src/mainboard/iwill/dk8_htx/romstage.c index cdfdfc09c5..cdfdfc09c5 100644 --- a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c +++ b/src/mainboard/iwill/dk8_htx/romstage.c diff --git a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c b/src/mainboard/iwill/dk8s2/romstage.c index 271ad6cc54..271ad6cc54 100644 --- a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c +++ b/src/mainboard/iwill/dk8s2/romstage.c diff --git a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c b/src/mainboard/iwill/dk8x/romstage.c index 271ad6cc54..271ad6cc54 100644 --- a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c +++ b/src/mainboard/iwill/dk8x/romstage.c |