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authorStefan Reinauer <stepan@coresystems.de>2010-03-29 19:19:16 +0000
committerStefan Reinauer <stepan@openbios.org>2010-03-29 19:19:16 +0000
commit5e32823a68f74618845c21600c8fa491f9c6c1a4 (patch)
tree1fa08af567dc3e2e95f5d89b2dc34292bb61c67b /src/mainboard/iwill
parent8013d5a568d6ad3b98587ea2bb23dcbd06d7ed18 (diff)
downloadcoreboot-5e32823a68f74618845c21600c8fa491f9c6c1a4.tar.xz
__PRE_RAM__ is now correctly specified in the Makefile. No need to hack it into
romstage.c anymore Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/iwill')
-rw-r--r--src/mainboard/iwill/dk8_htx/romstage.c2
-rw-r--r--src/mainboard/iwill/dk8s2/romstage.c2
-rw-r--r--src/mainboard/iwill/dk8x/romstage.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c
index ca080e6d93..1eb98fc4ce 100644
--- a/src/mainboard/iwill/dk8_htx/romstage.c
+++ b/src/mainboard/iwill/dk8_htx/romstage.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __PRE_RAM__
+
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c
index eb29d10a21..f04e3eac86 100644
--- a/src/mainboard/iwill/dk8s2/romstage.c
+++ b/src/mainboard/iwill/dk8s2/romstage.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __PRE_RAM__
+
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/iwill/dk8x/romstage.c b/src/mainboard/iwill/dk8x/romstage.c
index 6128e0cd2e..c46bdebef4 100644
--- a/src/mainboard/iwill/dk8x/romstage.c
+++ b/src/mainboard/iwill/dk8x/romstage.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __PRE_RAM__
+
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0