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author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 22:47:22 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-21 22:47:22 +0000 |
commit | 7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32 (patch) | |
tree | 5339d014fbd29d3eb27cc82987eb7d655d9d8d1a /src/mainboard/jetway/j7f24 | |
parent | 57b2ff886e0ce2c92820f5722c8031def3ac94cf (diff) | |
download | coreboot-7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32.tar.xz |
Simplify a few code chunks, fix whitespace and indentation.
Also, remove some less useful comments, some dead code / unused functions.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/jetway/j7f24')
-rw-r--r-- | src/mainboard/jetway/j7f24/romstage.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/src/mainboard/jetway/j7f24/romstage.c b/src/mainboard/jetway/j7f24/romstage.c index 6cfaaa4173..daacd1bebd 100644 --- a/src/mainboard/jetway/j7f24/romstage.c +++ b/src/mainboard/jetway/j7f24/romstage.c @@ -53,7 +53,8 @@ static void enable_mainboard_devices(void) { device_t dev; - dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0); + dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, + PCI_DEVICE_ID_VIA_VT8237R_LPC), 0); if (dev == PCI_DEV_INVALID) die("Southbridge not found!!!\n"); @@ -94,20 +95,15 @@ void main(unsigned long bist) uart_init(); console_init(); - print_spew("In romstage.c:main()\n"); - enable_smbus(); smbus_fixup(&ctrl); /* Halt if there was a built-in self test failure. */ report_bist_failure(bist); - print_debug("Enabling mainboard devices\n"); enable_mainboard_devices(); ddr_ram_setup(&ctrl); /* ram_check(0, 640 * 1024); */ - - print_spew("Leaving romstage.c:main()\n"); } |