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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-21 11:36:03 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-21 11:36:03 +0000
commit6dc92f0d1a4b6a79c2db800c5bd071daa75a9a23 (patch)
tree1b06518d371222763417675b38161d261bd42f93 /src/mainboard/jetway/j7f24
parent86a571797d9ede9d79edcfdce38f50a80b9a49f9 (diff)
downloadcoreboot-6dc92f0d1a4b6a79c2db800c5bd071daa75a9a23.tar.xz
Use DIMM0 et al in lots more places instead of hardocding values.
The (0xa << 3) expression equals 0x50, i.e. DIMM0. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6103 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/jetway/j7f24')
-rw-r--r--src/mainboard/jetway/j7f24/romstage.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/jetway/j7f24/romstage.c b/src/mainboard/jetway/j7f24/romstage.c
index 0d70b70f82..0e1f078f82 100644
--- a/src/mainboard/jetway/j7f24/romstage.c
+++ b/src/mainboard/jetway/j7f24/romstage.c
@@ -34,6 +34,7 @@
#include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
#include "superio/fintek/f71805f/f71805f_early_serial.c"
#include <lib.h>
+#include <spd.h>
#if CONFIG_TTYS0_BASE == 0x2f8
#define SERIAL_DEV PNP_DEV(0x2e, F71805F_SP2)