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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-02-24 11:08:53 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-03-10 16:56:23 +0100 |
| commit | 7e3903b1f13fb387d6a9b9147faf5fda090c93db (patch) | |
| tree | 547d247149cc1482e9af26ed7b7105cfcdd17553 /src/mainboard/jetway/j7f2 | |
| parent | 3d840d09aea6246347afea8f19dc1d71da06aba2 (diff) | |
| download | coreboot-7e3903b1f13fb387d6a9b9147faf5fda090c93db.tar.xz | |
cpu/via/c7: Don't manually include udelay_io.c
Use UDELAY_IO selected by CPU_VIA_C7, so no manual inclusion
(or secondary UDELAY implementation) is needed
Change-Id: Ib086a1bfe8ffca5757bf553c5a62a45da7a410b6
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13782
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/jetway/j7f2')
| -rw-r--r-- | src/mainboard/jetway/j7f2/romstage.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/jetway/j7f2/romstage.c b/src/mainboard/jetway/j7f2/romstage.c index 3c4835f99e..42aaa0c05c 100644 --- a/src/mainboard/jetway/j7f2/romstage.c +++ b/src/mainboard/jetway/j7f2/romstage.c @@ -23,7 +23,6 @@ #include <console/console.h> #include <northbridge/via/cn700/raminit.h> #include <cpu/x86/bist.h> -#include "drivers/pc80/udelay_io.c" #include <delay.h> #include "southbridge/via/vt8237r/early_smbus.c" #include <superio/fintek/common/fintek.h> |