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author | Tobias Diedrich <ranma+coreboot@tdiedrich.de> | 2015-06-21 18:25:38 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-09-30 07:02:41 +0000 |
commit | 6a4d6825acf324c02198fa73838c1eeaf4fdffc7 (patch) | |
tree | c57fb5ae76bb07eb5ec55250b3c55e03a5acd493 /src/mainboard/jetway/nf81-t56n-lf/dsdt.asl | |
parent | b0c6817dbecbb7c3bb9dd7436dc15e8846abc037 (diff) | |
download | coreboot-6a4d6825acf324c02198fa73838c1eeaf4fdffc7.tar.xz |
amd/family14: Add k10temp thermal zone.
The thermal sensor interface exposed in function 3 of the northbridge is
a more convenient and faster way to access the processor-internal
thermal sensor than using the SMBus/SB-TSI interface from the FCH, see
the Family14 BKDG: "Tctl is a processor temperature control value used
for processor thermal management. Tctl is accessible through SB-TSI and
D18F3xA4[CurTmp]. Tctl is a temperature on its own scale aligned to the
processors cooling requirements"
Also on at least some of these boards the existing thermal zone is
broken and always returns 40C (the default value if the SMBus read
failed) because the SMBus muxing register (SmBus0Sel) is not set up
correctly.
Case in point: The fallback "smbus read failed" temperature is 40 C and
the the logs taken from the board status repository for the Asrock
E350M1 board all show: "ACPI: Thermal Zone [TZ00] (40 C)"
e.g.
http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asrock/e350m1/4.0-5054-gf584218/2013-12-20T20:56:20Z/kernel_log.txt#l390
and
http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asrock/e350m1/4.0-7030-g6d7de4f/2014-10-16T15:34:19Z/kernel_console.txt#l404
and
http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=asrock/e350m1/4.0-9989-gf2dfef0/2015-06-13T00:22:49Z/kernel_log.txt#l425
Example lm-sensors output with this patch on the pcengines APU1, on
Linux 4.1.0-rc8+ (wiht both CONFIG_ACPI_THERMAL and
CONFIG_SENSORS_K10TEMP enabled):
acpitz-virtual-0
Adapter: Virtual device
temp1: +54.0 C (crit = +100.0 C)
k10temp-pci-00c3
Adapter: PCI adapter
temp1: +54.0 C (high = +70.0 C)
(crit = +100.0 C, hyst = +97.0 C)
Change-Id: Id9c5b783ba424246816677099ec6651814e59f21
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Reviewed-on: http://review.coreboot.org/10940
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/jetway/nf81-t56n-lf/dsdt.asl')
-rw-r--r-- | src/mainboard/jetway/nf81-t56n-lf/dsdt.asl | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/dsdt.asl b/src/mainboard/jetway/nf81-t56n-lf/dsdt.asl index 529fd728aa..64b00d0a76 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/dsdt.asl +++ b/src/mainboard/jetway/nf81-t56n-lf/dsdt.asl @@ -57,8 +57,6 @@ DefinitionBlock ( #include "acpi/sleep.asl" #include "acpi/gpe.asl" - #include <southbridge/amd/cimx/sb800/acpi/smbus.asl> - #include "acpi/thermal.asl" #include "acpi/superio.asl" } /* End of ASL file */ |