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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-22 10:24:20 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-28 17:25:15 +0200 |
commit | b426107d1db17b606a90be83ddd3bf8a1c0d8751 (patch) | |
tree | 0fa5addebf1993a25d8a74fd405bbf59c3def7f8 /src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c | |
parent | cdfb46240b4bba8a112c85a5f5d26447e90378b3 (diff) | |
download | coreboot-b426107d1db17b606a90be83ddd3bf8a1c0d8751.tar.xz |
AGESA f14 f15tn 16kb: Move IOAPIC ID setup out of get_bus_conf()
Change-Id: I7fd14c17242cd3deb7a784fc918ad6fe1191bd13
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6359
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c')
-rw-r--r-- | src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c b/src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c index cc3ffbbeb6..2cfc5c699b 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c +++ b/src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c @@ -33,14 +33,9 @@ * mptable and acpi_tables where busnum is default. */ u8 bus_sb800[6]; -u32 apicid_sb800; -u32 apicver_sb800; - void get_bus_conf(void) { - u32 apicid_base; - device_t dev; int i; @@ -61,16 +56,4 @@ void get_bus_conf(void) bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS); } } - - /* I/O APICs: APIC ID Version State Address */ - apicid_base = CONFIG_MAX_CPUS; - - /* - * By the time this function gets called, the IOAPIC registers - * have been written so they can be read to get the correct - * APIC ID and Version - */ - apicid_sb800 = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24); - apicver_sb800 = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF); - } |