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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-04-10 19:12:28 +1000
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-04-15 05:16:21 +0200
commitfeebd86ad2fe78955fda852103a8363a2da0cf59 (patch)
tree9794c3ad47079b37c8f2a270ef54f93cc50eaa3b /src/mainboard/jetway/nf81-t56n-lf/mptable.c
parentc12db59bced7b54dc9f55bbb06716a46875b211a (diff)
downloadcoreboot-feebd86ad2fe78955fda852103a8363a2da0cf59.tar.xz
mainboard/jetway/nf81-t56n-lf: Documentation cosmetics
Keep under 80 colums and Doxygen'ify inline documentation somewhat. Strip some whitespace bulk while here and refactor a little as to line wrap. Additionally, following the reasoning of: 0b2fa34 hp/pavilion_m6_1035dx/buildOpts.c: Remove commented out tables remove some fluff from buildOpts.c Change-Id: Icb38f087724d3e3511df1d554a620eb637ce286a Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5481 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/jetway/nf81-t56n-lf/mptable.c')
-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/mptable.c13
1 files changed, 7 insertions, 6 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/mptable.c b/src/mainboard/jetway/nf81-t56n-lf/mptable.c
index d7fe6a06d0..7a0872620a 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/mptable.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/mptable.c
@@ -95,7 +95,6 @@ static void *smp_write_config_table(void *v)
PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]);
PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]);
- //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */
PCI_INT(0x0, 0x14, 0x0, 0x10);
/* Southbridge HD Audio: */
PCI_INT(0x0, 0x14, 0x2, 0x12);
@@ -107,10 +106,10 @@ static void *smp_write_config_table(void *v)
PCI_INT(0x0, 0x16, 0x0, intr_data[0x34]);
PCI_INT(0x0, 0x16, 0x1, intr_data[0x35]);
- /* sata */
+ /* SATA */
PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]);
- /* on board NIC & Slot PCIE. */
+ /* On-board NIC & Slot PCIE. */
/* PCI slots */
/* PCI_SLOT 0. */
@@ -119,7 +118,7 @@ static void *smp_write_config_table(void *v)
PCI_INT(bus_sb800[1], 0x5, 0x2, 0x16);
PCI_INT(bus_sb800[1], 0x5, 0x3, 0x17);
- /* PCI_SLOT 1. */
+ /* On-board Realtek NIC 1. */
PCI_INT(bus_sb800[1], 0x6, 0x0, 0x15);
PCI_INT(bus_sb800[1], 0x6, 0x1, 0x16);
PCI_INT(bus_sb800[1], 0x6, 0x2, 0x17);
@@ -135,7 +134,7 @@ static void *smp_write_config_table(void *v)
PCI_INT(bus_sb800[2], 0x0, 0x1, 0x13);
PCI_INT(bus_sb800[2], 0x0, 0x2, 0x14);
- /* PCIe PortA */
+ /* On-board Realtek NIC 2. (PCIe PortA) */
PCI_INT(0x0, 0x15, 0x0, 0x10);
/* PCIe PortB */
PCI_INT(0x0, 0x15, 0x1, 0x11);
@@ -144,7 +143,9 @@ static void *smp_write_config_table(void *v)
/* PCIe PortD */
PCI_INT(0x0, 0x15, 0x3, 0x13);
- /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
+ /* Local Ints:
+ * Type | Polarity | Trigger | Bus ID | IRQ | APIC ID PIN#
+ */
IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0);
IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1);
/* There is no extension information... */