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authorDave Frodin <dave.frodin@se-eng.com>2014-06-13 08:12:48 -0600
committerDave Frodin <dave.frodin@se-eng.com>2014-07-02 21:47:28 +0200
commit2093c4f7c220068e630b756dd19b89ab1ddec88e (patch)
treefa596f88343dedd290583896947647b38310f832 /src/mainboard/jetway/nf81-t56n-lf
parent931c1dcec043e6baac718a94f8731cc31461d4db (diff)
downloadcoreboot-2093c4f7c220068e630b756dd19b89ab1ddec88e.tar.xz
AMD/agesa: Add functions for AMD PCI IRQ routing
Port the changes that were made in amd/cimx to amd/agesa as were done in: commit c93a75a5ab067f86104028b74d92fc54cb939cd5 Author: Mike Loptien <mike.loptien@se-eng.com> Date: Fri Jun 6 15:16:29 2014 -0600 AMD/CIMx: Add functions for AMD PCI IRQ routing This change also moves the PCI INT functions to southbridge/amd so that they can be used by CIMX and AGESA. The amd/persimmon board is updated for this change. Signed-off-by: Dave Frodin <dave.frodin@se-eng.com> Change-Id: I525be90f9cf8e825e162d53a7ecd1e69c6e27637 Reviewed-on: http://review.coreboot.org/6065 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/jetway/nf81-t56n-lf')
-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/mainboard.c1
-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/mptable.c2
2 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
index 6053550b56..56f6c43dfb 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
@@ -30,6 +30,7 @@
#include <device/pci.h>
#include <device/pci_def.h>
+#include <southbridge/amd/amd_pci_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
#include <southbridge/amd/cimx/sb800/pci_devs.h>
#include <southbridge/amd/cimx/cimx_util.h>
diff --git a/src/mainboard/jetway/nf81-t56n-lf/mptable.c b/src/mainboard/jetway/nf81-t56n-lf/mptable.c
index a97810cf54..12cb9d1049 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/mptable.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/mptable.c
@@ -30,8 +30,8 @@
#include <stdint.h>
#include <string.h>
+#include <southbridge/amd/amd_pci_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
-#include <southbridge/amd/cimx/cimx_util.h>
extern u8 bus_sb800[6];
extern u32 apicid_sb800;