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authorAngel Pons <th3fanbus@gmail.com>2020-11-03 00:03:32 +0100
committerAngel Pons <th3fanbus@gmail.com>2020-11-23 09:55:43 +0000
commit2c0aa00d6e562b2e6dbe580e188e24ce5e4336e2 (patch)
tree3e4f0749bda60dd17635765faf47541eb59a4b1c /src/mainboard/jetway/nf81-t56n-lf
parent447233ce8c25863c2236d0b208bff7f63cd738fb (diff)
downloadcoreboot-2c0aa00d6e562b2e6dbe580e188e24ce5e4336e2.tar.xz
mb/**/cmos.layout: Remove crusty comments
Most of these comments have been copy-pasted or serve no purpose other than to eventually turn into misleading info. While the description of the first 120 bits of CMOS could be useful, it should instead be added to the documentation for the CMOS option infrastructure, or /dev/null. Moreover, trim down newlines to no more than two consecutive newlines. Change-Id: I119b248821221e68c4e31edba71ba83b7d2e14e9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47143 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/mainboard/jetway/nf81-t56n-lf')
-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/cmos.layout3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/cmos.layout b/src/mainboard/jetway/nf81-t56n-lf/cmos.layout
index beedaa7930..18bac8ee34 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/cmos.layout
+++ b/src/mainboard/jetway/nf81-t56n-lf/cmos.layout
@@ -8,7 +8,6 @@ entries
0 384 r 0 reserved_memory
384 1 e 4 boot_option
388 4 h 0 reboot_counter
-#392 3 r 0 unused
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
397 2 e 8 max_mem_clock
@@ -24,8 +23,6 @@ entries
# Reserve the extended AMD configuration registers
1000 24 r 0 amd_reserved
-
-
enumerations
#ID value text