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| author | Angel Pons <th3fanbus@gmail.com> | 2020-05-20 23:34:54 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-05-26 11:32:13 +0000 |
| commit | 66ee42daba635a0748262092b28a3ee87bbfd573 (patch) | |
| tree | 2bd3dc4ce21bfd183c66681d908fd1cd392288ff /src/mainboard/jetway/nf81-t56n-lf | |
| parent | 927f6ae84a7b59b630250a7e559aac1eb05ae2f5 (diff) | |
| download | coreboot-66ee42daba635a0748262092b28a3ee87bbfd573.tar.xz | |
mb/*/*/buildOpts.c: Clean up whitespace
Drop multiple blank lines and use one space inside C-style comments.
TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb
mainboards result in identical coreboot binaries.
Change-Id: Ibe1f279dd22ae7657ea7b7766f88004dbf4dceb5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41589
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Diffstat (limited to 'src/mainboard/jetway/nf81-t56n-lf')
| -rw-r--r-- | src/mainboard/jetway/nf81-t56n-lf/buildOpts.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c index cdaecf0efc..4e1c95af6f 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c +++ b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c @@ -9,10 +9,8 @@ * build option selections desired for that platform. * * For Information about this file, see @ref platforminstall. - * */ - #include <vendorcode/amd/agesa/f14/AGESA.h> /* Include the files that instantiate the configuration definitions. */ @@ -27,7 +25,6 @@ #include <vendorcode/amd/agesa/f14/Proc/Mem/mm.h> #include <vendorcode/amd/agesa/f14/Proc/Mem/mn.h> - /* Select the CPU family. */ #define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE @@ -99,7 +96,6 @@ #define BLDOPT_REMOVE_GFX_RECOVERY TRUE #define BLDOPT_REMOVE_EARLY_SAMPLES TRUE - #define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS #define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER @@ -255,7 +251,7 @@ const AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] = #define DDR1866_FREQUENCY 933 /**< DDR 1866 */ #define UNSUPPORTED_DDR_FREQUENCY 934 /**< Max limit of DDR frequency */ -/* QUANDRANK_TYPE*/ +/* QUANDRANK_TYPE */ #define QUADRANK_REGISTERED 0 /**< Quadrank registered DIMM */ #define QUADRANK_UNBUFFERED 1 /**< Quadrank unbuffered DIMM */ |