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authorWang Qing Pei <wangqingpei@gmail.com>2010-08-17 15:19:32 +0000
committerStefan Reinauer <stepan@openbios.org>2010-08-17 15:19:32 +0000
commit0ede4c08a9eb5e68420dde42e9a0fec004076b3e (patch)
tree039100fea1992cc199e5b3759272967c13249fcd /src/mainboard/jetway/pa78vm5/devicetree.cb
parent42e7c32cc5253c2c8c6149a57a4667ec5ebf8262 (diff)
downloadcoreboot-0ede4c08a9eb5e68420dde42e9a0fec004076b3e.tar.xz
Commit (non-working!) Jetway PA78VM5 mainboard
Signed-off-by: Wang Qing Pei <wangqingpei@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5718 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/jetway/pa78vm5/devicetree.cb')
-rw-r--r--src/mainboard/jetway/pa78vm5/devicetree.cb118
1 files changed, 118 insertions, 0 deletions
diff --git a/src/mainboard/jetway/pa78vm5/devicetree.cb b/src/mainboard/jetway/pa78vm5/devicetree.cb
new file mode 100644
index 0000000000..cc43ceb2c1
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+++ b/src/mainboard/jetway/pa78vm5/devicetree.cb
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+# sample config for jetway/PA78VM5
+chip northbridge/amd/amdfam10/root_complex
+ device lapic_cluster 0 on
+ chip cpu/amd/socket_AM2r2 #L1 and DDR2
+ device lapic 0 on end
+ end
+ end
+ device pci_domain 0 on
+ chip northbridge/amd/amdfam10
+ device pci 18.0 on # northbridge
+ chip southbridge/amd/rs780
+ device pci 0.0 on end # HT 0x9600
+ device pci 1.0 on end # Internal Graphics P2P bridge 0x9602
+ device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x9603
+ device pci 3.0 on end # PCIE P2P bridge 0x960b
+ device pci 4.0 on end # PCIE P2P bridge 0x9604
+ device pci 5.0 off end # PCIE P2P bridge 0x9605
+ device pci 6.0 off end # PCIE P2P bridge 0x9606
+ device pci 7.0 off end # PCIE P2P bridge 0x9607
+ device pci 8.0 off end # NB/SB Link P2P bridge
+ device pci 9.0 on end #
+ device pci a.0 on end #
+ register "gppsb_configuration" = "1" # Configuration B
+ register "gpp_configuration" = "3" # Configuration D default
+ register "port_enable" = "0x6fc"
+ register "gfx_dev2_dev3" = "1"
+ register "gfx_dual_slot" = "1"
+ register "gfx_lane_reversal" = "0"
+ register "gfx_tmds" = "0"
+ register "gfx_compliance" = "0"
+ register "gfx_reconfiguration" = "1"
+ register "gfx_link_width" = "0"
+ end
+ chip southbridge/amd/sb700 # it is under NB/SB Link, but on the same pri bus
+ device pci 11.0 on end # SATA
+ device pci 12.0 on end # USB
+ device pci 12.1 on end # USB
+ device pci 12.2 on end # USB
+ device pci 13.0 on end # USB
+ device pci 13.1 on end # USB
+ device pci 13.2 on end # USB
+ device pci 14.0 on # SM
+ chip drivers/generic/generic #dimm 0-0-0
+ device i2c 50 on end
+ end
+ chip drivers/generic/generic #dimm 0-0-1
+ device i2c 51 on end
+ end
+ chip drivers/generic/generic #dimm 0-1-0
+ device i2c 52 on end
+ end
+ chip drivers/generic/generic #dimm 0-1-1
+ device i2c 53 on end
+ end
+ end # SM
+ device pci 14.1 on end # IDE 0x439c
+ device pci 14.2 on end # HDA 0x4383
+ device pci 14.3 on # LPC 0x439d
+ chip superio/fintek/f71863fg
+ device pnp 2e.0 off # Floppy
+ io 0x60 = 0x3f0
+ irq 0x70 = 6
+ drq 0x74 = 2
+ end
+ device pnp 2e.1 on # Com1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 2e.2 off # Com2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ device pnp 2e.3 off # Parallel Port
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ end
+ device pnp 2e.4 off end # EC
+ device pnp 2e.5 on # Keyboard
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ end
+ device pnp 2e.6 on # Mouse
+ irq 0x70 = 12
+ end
+ device pnp 2e.7 off # GPIO, must be closed for unresolved reason.
+ end
+ device pnp 2e.8 off # MIDI
+ io 0x60 = 0x300
+ irq 0x70 = 9
+ end
+ device pnp 2e.9 off # GAME
+ io 0x60 = 0x220
+ end
+ device pnp 2e.a off end # CIR
+ end #superio/ite/it8718f
+ end #LPC
+ device pci 14.4 on end # PCI 0x4384
+ device pci 14.5 on end # USB 2
+ register "ide0_enable" = "1"
+ register "sata0_enable" = "1"
+ register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
+ register "hda_viddid" = "0x10ec0882"
+ end #southbridge/amd/sb700
+ end # device pci 18.0
+
+ device pci 18.0 on end
+ device pci 18.0 on end
+ device pci 18.1 on end
+ device pci 18.2 on end
+ device pci 18.3 on end
+ device pci 18.4 on end
+# device pci 00.5 on end
+ end
+ end #pci_domain
+ #for node 32 to node 63
+
+end