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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-06-02 14:52:25 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-06-04 08:45:38 +0000 |
| commit | 2d7825b0fce070f41ef35b7fdcf599550663dbe9 (patch) | |
| tree | ff063eb4778b7640bb0669cd31758c16dc8ada04 /src/mainboard/jetway/pa78vm5 | |
| parent | 975da840d094489da35c2770eab7afe4ef769be8 (diff) | |
| download | coreboot-2d7825b0fce070f41ef35b7fdcf599550663dbe9.tar.xz | |
amdfam10: Fix mismatch of function declarations
Callsite declared returning int, which makes more sense
than u8 the motherboard side code defined the functions
with.
Change-Id: I8ee83aa2833408ad163c9011a076e08578f3ca6f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/jetway/pa78vm5')
| -rw-r--r-- | src/mainboard/jetway/pa78vm5/mainboard.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/jetway/pa78vm5/mainboard.c b/src/mainboard/jetway/pa78vm5/mainboard.c index ab305e3378..906b070569 100644 --- a/src/mainboard/jetway/pa78vm5/mainboard.c +++ b/src/mainboard/jetway/pa78vm5/mainboard.c @@ -23,10 +23,10 @@ #include <device/pci_def.h> #include "southbridge/amd/sb700/sb700.h" #include "southbridge/amd/sb700/smbus.h" +#include "southbridge/amd/rs780/rs780.h" void set_pcie_dereset(void); void set_pcie_reset(void); -u8 is_dev3_present(void); /* * the board uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to @@ -87,7 +87,7 @@ static void get_ide_dma66(void) } #endif /* get_ide_dma66() */ -u8 is_dev3_present(void) +int is_dev3_present(void) { return 0; } |