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author | Wang Qing Pei <wangqingpei@gmail.com> | 2010-08-18 01:55:11 +0000 |
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committer | Zheng Bao <Zheng.Bao@amd.com> | 2010-08-18 01:55:11 +0000 |
commit | d6c43959279866f0c360e8d75d0a25b3e530e9e5 (patch) | |
tree | b93b36811d5614d569c62edffd37334bd1d78b0e /src/mainboard/jetway/pa78vm5 | |
parent | c7d2773e121637b5b76d1437fac5a93e397a64bb (diff) | |
download | coreboot-d6c43959279866f0c360e8d75d0a25b3e530e9e5.tar.xz |
The attached file add pa78vm5 dev3 detection function to avoid the building error.
Signed-off-by: Wang Qing Pei <wangqingpei@gmail.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5721 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/jetway/pa78vm5')
-rw-r--r-- | src/mainboard/jetway/pa78vm5/mainboard.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/jetway/pa78vm5/mainboard.c b/src/mainboard/jetway/pa78vm5/mainboard.c index a5ac631be0..9059a29e9b 100644 --- a/src/mainboard/jetway/pa78vm5/mainboard.c +++ b/src/mainboard/jetway/pa78vm5/mainboard.c @@ -35,6 +35,7 @@ uint64_t uma_memory_base, uma_memory_size; void set_pcie_dereset(void); void set_pcie_reset(void); +u8 is_dev3_present(void); /* * the board uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to @@ -95,6 +96,11 @@ static void get_ide_dma66(void) } #endif /* get_ide_dma66() */ +u8 is_dev3_present(void) +{ + return 0; +} + /************************************************* * enable the dedicated function in this board. * This function called early than rs780_enable. |