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authorPatrick Georgi <patrick@georgi-clan.de>2012-02-16 19:16:14 +0100
committerPatrick Georgi <patrick@georgi-clan.de>2012-02-22 22:16:15 +0100
commit91bd3068a7c28d429bb7a2581ccee40645c137c9 (patch)
tree70706e7cc3e6a990b16e2553c706d492eeb0b3e6 /src/mainboard/jetway
parentb05bf5bca978a12a5c278bf1fbc90e7f5cff69ae (diff)
downloadcoreboot-91bd3068a7c28d429bb7a2581ccee40645c137c9.tar.xz
ACPI: More ../../.. removal
CPP is ran with src/ as part of its search path, so using <northbridge/...> and the like is safe. Change-Id: I644d60190ac92ef284d5f0b4acf44f7db3c788ee Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/649 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/jetway')
-rw-r--r--src/mainboard/jetway/pa78vm5/dsdt.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/jetway/pa78vm5/dsdt.asl b/src/mainboard/jetway/pa78vm5/dsdt.asl
index 38de9b9f27..8f75019a18 100644
--- a/src/mainboard/jetway/pa78vm5/dsdt.asl
+++ b/src/mainboard/jetway/pa78vm5/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
0x00010001 /* OEM Revision */
)
{ /* Start of ASL file */
- /* #include "../../../arch/x86/acpi/debug.asl" */ /* Include global debug methods if needed */
+ /* #include <arch/x86/acpi/debug.asl> */ /* Include global debug methods if needed */
/* Data to be patched by the BIOS during POST */
/* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@ DefinitionBlock (
/* South Bridge */
Scope(\_SB) { /* Start \_SB scope */
- #include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+ #include <arch/x86/acpi/globutil.asl> /* global utility methods expected within the \_SB scope */
/* _SB.PCI0 */
/* Note: Only need HID on Primary Bus */