diff options
| author | Nick Vaccaro <nvaccaro@google.com> | 2020-05-06 20:06:41 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-13 08:53:45 +0000 |
| commit | 6a197964d9f21305595d5f8dba3b7ad1f0547307 (patch) | |
| tree | cff007474c0eed021ed17b32fc9fa6a4e7897624 /src/mainboard/jetway | |
| parent | e30c396ffabb3d3c966eecfcd291ca11b815ba7a (diff) | |
| download | coreboot-6a197964d9f21305595d5f8dba3b7ad1f0547307.tar.xz | |
mb/google/volteer/variants/volteer: Add three generic SPD files
- Add SPD_LPDDR4X_200b_1R_16Gb_16Row_DDP_4267.spd.hex, initially
used for the SKhynix H9HCNNNBKMMLXR-NEE part with DRAM ID #2
- Add SPD_LPDDR4X_200b_2R_64Gb_ODP_4267.spd.hex, initially
used for the SKhynix H9HCNNNFAMMLXR-NEE part with DRAM ID #3
- Add SPD_LPDDR4X_200b_2R_32Gb_QDP_4267.spd.hex, initially
used for the Micron MT53E1G32D2NP-046 WT:A part with DRAM ID #4
BUG=b:147857288
TEST=none
Change-Id: I60d8bb05a4d6d3608adc7de69efc8623d1ca610d
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41126
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/jetway')
0 files changed, 0 insertions, 0 deletions