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authorElyes HAOUAS <ehaouas@noos.fr>2018-06-16 18:29:33 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-07-02 07:38:32 +0000
commit4ad1446b8333b258110d275c58d17b2d9ebbfa23 (patch)
tree4eb01f6dd61bbb872fcb3545343e5ec640a2f482 /src/mainboard/jetway
parenteafb31be308069f15c53511bd8493dd259614573 (diff)
downloadcoreboot-4ad1446b8333b258110d275c58d17b2d9ebbfa23.tar.xz
src/mb: Fix non-local header treated as local
Also remove some unnedded includes. Change-Id: I036208a111d009620d8354fa9c97688eb4e872ad Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27129 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/jetway')
-rw-r--r--src/mainboard/jetway/pa78vm5/mainboard.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/mainboard/jetway/pa78vm5/mainboard.c b/src/mainboard/jetway/pa78vm5/mainboard.c
index 9585832ebe..066bd2edff 100644
--- a/src/mainboard/jetway/pa78vm5/mainboard.c
+++ b/src/mainboard/jetway/pa78vm5/mainboard.c
@@ -18,12 +18,10 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/mtrr.h>
#include <device/pci_def.h>
-#include "southbridge/amd/sb700/sb700.h"
-#include "southbridge/amd/sb700/smbus.h"
-#include "southbridge/amd/rs780/rs780.h"
+#include <southbridge/amd/sb700/sb700.h>
+#include <southbridge/amd/sb700/smbus.h>
+#include <southbridge/amd/rs780/rs780.h>
/*
* the board uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to