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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-06-03 06:12:03 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-06-04 08:46:56 +0000 |
| commit | 564c2191ab5d2c57ce7d3fda9a7596ef3e39b975 (patch) | |
| tree | c21f844d42c7addb874ea83b060e45b785d5cdf5 /src/mainboard/jetway | |
| parent | 1bad4ce421188748d1c3dd6bafe3863cbb21dd24 (diff) | |
| download | coreboot-564c2191ab5d2c57ce7d3fda9a7596ef3e39b975.tar.xz | |
sb/amd/rs780: Fix invalid function declarations
Provide empty stub implementations for set_pcie_reset() and
set_pcie_dereset(), many boards do not provide a proper one.
Change-Id: Ia6811442905ef1776fa5a8e3f5d4433e86e42f88
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26776
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/jetway')
| -rw-r--r-- | src/mainboard/jetway/pa78vm5/mainboard.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/mainboard/jetway/pa78vm5/mainboard.c b/src/mainboard/jetway/pa78vm5/mainboard.c index 906b070569..9585832ebe 100644 --- a/src/mainboard/jetway/pa78vm5/mainboard.c +++ b/src/mainboard/jetway/pa78vm5/mainboard.c @@ -25,14 +25,11 @@ #include "southbridge/amd/sb700/smbus.h" #include "southbridge/amd/rs780/rs780.h" -void set_pcie_dereset(void); -void set_pcie_reset(void); - /* * the board uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to * pull it up before training the slot. ***/ -void set_pcie_dereset() +void set_pcie_dereset(void) { u16 word; struct device *sm_dev; @@ -45,7 +42,7 @@ void set_pcie_dereset() pci_write_config16(sm_dev, 0xA8, word); } -void set_pcie_reset() +void set_pcie_reset(void) { u16 word; struct device *sm_dev; |