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author | Stefan Reinauer <stepan@coresystems.de> | 2010-03-31 14:47:43 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2010-03-31 14:47:43 +0000 |
commit | 64ed2b73451de4b655b3fdda0ff42825a165c317 (patch) | |
tree | 0faaae313a9a9edbf8b33f56fc18830ba14aa75f /src/mainboard/jetway | |
parent | 5a1f5970857a5ad1fda0cf9d5945192408bf537b (diff) | |
download | coreboot-64ed2b73451de4b655b3fdda0ff42825a165c317.tar.xz |
Drop \r\n and \n\r as both print_XXX and printk now do this internally.
Only some assembler files still have \r\n ... Can we move that part to C
completely?
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5342 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/jetway')
-rw-r--r-- | src/mainboard/jetway/j7f24/romstage.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/jetway/j7f24/romstage.c b/src/mainboard/jetway/j7f24/romstage.c index 4de5aa72ab..a0ad339cd9 100644 --- a/src/mainboard/jetway/j7f24/romstage.c +++ b/src/mainboard/jetway/j7f24/romstage.c @@ -103,26 +103,26 @@ static void main(unsigned long bist) uart_init(); console_init(); - print_spew("In romstage.c:main()\r\n"); + print_spew("In romstage.c:main()\n"); enable_smbus(); smbus_fixup(&ctrl); if (bist == 0) { - print_debug("doing early_mtrr\r\n"); + print_debug("doing early_mtrr\n"); early_mtrr_init(); } /* Halt if there was a built-in self test failure. */ report_bist_failure(bist); - print_debug("Enabling mainboard devices\r\n"); + print_debug("Enabling mainboard devices\n"); enable_mainboard_devices(); ddr_ram_setup(&ctrl); /* ram_check(0, 640 * 1024); */ - print_spew("Leaving romstage.c:main()\r\n"); + print_spew("Leaving romstage.c:main()\n"); } |