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authorMyles Watson <mylesgw@gmail.com>2010-09-28 16:16:58 +0000
committerMyles Watson <mylesgw@gmail.com>2010-09-28 16:16:58 +0000
commit24a5213a3930ce676f56b47b4e55a8e2a8c24844 (patch)
tree3c9f814d6c5fb6a12bc44808a4639a60dc995e33 /src/mainboard/jetway
parent7b1a3c334cbb71f44c03f9d72cb33715856c563d (diff)
downloadcoreboot-24a5213a3930ce676f56b47b4e55a8e2a8c24844.tar.xz
Remove redundant HW_MEM_HOLE_SIZEK and HW_MEM_HOLE_SIZE_AUTO_INC settings.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/jetway')
-rw-r--r--src/mainboard/jetway/pa78vm5/Kconfig8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/jetway/pa78vm5/Kconfig b/src/mainboard/jetway/pa78vm5/Kconfig
index 6f5ed79810..e2768df8f2 100644
--- a/src/mainboard/jetway/pa78vm5/Kconfig
+++ b/src/mainboard/jetway/pa78vm5/Kconfig
@@ -40,10 +40,6 @@ config MAINBOARD_PART_NUMBER
string
default "PA78VM5 (Fam10)"
-config HW_MEM_HOLE_SIZEK
- hex
- default 0x100000
-
config MAX_CPUS
int
default 8
@@ -52,10 +48,6 @@ config MAX_PHYSICAL_CPUS
int
default 2
-config HW_MEM_HOLE_SIZE_AUTO_INC
- bool
- default n
-
config MEM_TRAIN_SEQ
int
default 2