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| author | Felix Held <felix-coreboot@felixheld.de> | 2020-08-28 02:12:52 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-31 06:42:56 +0000 |
| commit | d555d6a88cf733f9f5a0a24694691a6901a81c73 (patch) | |
| tree | b39cc00553b2ebd9bb7d3ef72a9462c351a3a61d /src/mainboard/jetway | |
| parent | 764b987a6f93a64f18b1557e1591fc2afe47110c (diff) | |
| download | coreboot-d555d6a88cf733f9f5a0a24694691a6901a81c73.tar.xz | |
mb/google/zork/dalboz: move PCIe GPP clock setting to devicetree
BUG=b:149970243
BRANCH=zork
Change-Id: I0b31466c5a991b02cef3432942f8de45805fe546
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44891
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/jetway')
0 files changed, 0 insertions, 0 deletions