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authorStefan Reinauer <stepan@coresystems.de>2010-04-07 15:40:26 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-07 15:40:26 +0000
commit56a684a2ee52b765fc69ec8c922c3da9d8ab7430 (patch)
treea8b4c74a857d8f09e071c0aebbbe887327ab24c6 /src/mainboard/jetway
parenteea66b7c3534d2959be482fc97b84d656c5bb953 (diff)
downloadcoreboot-56a684a2ee52b765fc69ec8c922c3da9d8ab7430.tar.xz
- copy_and_run() gets the same calling convention on AMD and on all the others.
- some vx800 Kconfig fixes - remove warnings... Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5372 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/jetway')
-rw-r--r--src/mainboard/jetway/j7f24/romstage.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/jetway/j7f24/romstage.c b/src/mainboard/jetway/j7f24/romstage.c
index a0ad339cd9..67eda8e8b5 100644
--- a/src/mainboard/jetway/j7f24/romstage.c
+++ b/src/mainboard/jetway/j7f24/romstage.c
@@ -44,10 +44,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, F71805F_SP1)
#endif
-static void memreset_setup(void)
-{
-}
-
static inline int spd_read_byte(unsigned device, unsigned address)
{
return smbus_read_byte(device, address);
@@ -93,9 +89,6 @@ static const struct mem_controller ctrl = {
static void main(unsigned long bist)
{
- unsigned long x;
- device_t dev;
-
/* Enable multifunction for northbridge. */
pci_write_config8(ctrl.d0f0, 0x4f, 0x01);