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authorLubomir Rintel <lkundrak@v3.sk>2017-04-03 15:35:09 +0200
committerMartin Roth <martinroth@google.com>2017-04-14 17:20:26 +0200
commitb0161fd2d8679882a50d1f3ce55cdf69278aa32f (patch)
tree4e1afe4ceae7eec8b832a61fa1de9da079b856ef /src/mainboard/jetway
parent38d1eb44031eb023f00d52481fc77286d28e5157 (diff)
downloadcoreboot-b0161fd2d8679882a50d1f3ce55cdf69278aa32f.tar.xz
southbridge/via/vt8237r: Get rid of #include early_smbus.c
Use linker instead of '#include *.c'. The smbus_fixup() was changed not to use a structure that's defined by a northbridge since multiple different northbridges can be used. Instead the caller now directly passed the memory slot details. Change-Id: Ia369ece6365accbc531736fc463c713bbc134807 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/19082 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/jetway')
-rw-r--r--src/mainboard/jetway/j7f2/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/jetway/j7f2/romstage.c b/src/mainboard/jetway/j7f2/romstage.c
index 393f5e6764..5aee95d7cd 100644
--- a/src/mainboard/jetway/j7f2/romstage.c
+++ b/src/mainboard/jetway/j7f2/romstage.c
@@ -25,7 +25,7 @@
#include <cpu/x86/bist.h>
#include <cpu/amd/car.h>
#include <delay.h>
-#include "southbridge/via/vt8237r/early_smbus.c"
+#include <southbridge/via/vt8237r/vt8237r.h>
#include <superio/fintek/common/fintek.h>
#include <superio/fintek/f71805f/f71805f.h>
#include <lib.h>
@@ -88,7 +88,7 @@ void main(unsigned long bist)
console_init();
enable_smbus();
- smbus_fixup(&ctrl);
+ smbus_fixup(ctrl.channel0, ARRAY_SIZE(ctrl.channel0));
/* Halt if there was a built-in self test failure. */
report_bist_failure(bist);