diff options
| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-05 09:07:10 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-05 09:07:10 +0000 |
| commit | d0835953506263b0d9218b62176693315f2ef2f3 (patch) | |
| tree | 677ecbe10516269e4870c4ca745cbc4259e8afc0 /src/mainboard/kontron | |
| parent | cc0dc7f839f5ccc3361e186f6bbc4c9a48155c78 (diff) | |
| download | coreboot-d0835953506263b0d9218b62176693315f2ef2f3.tar.xz | |
Remove lib/ramtest.c-include from all CAR boards.
Remove many more .c-includes from i945 based boards.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5910 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/kontron')
| -rw-r--r-- | src/mainboard/kontron/986lcd-m/romstage.c | 27 |
1 files changed, 6 insertions, 21 deletions
diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c index c6ea1b10d6..201d90378f 100644 --- a/src/mainboard/kontron/986lcd-m/romstage.c +++ b/src/mainboard/kontron/986lcd-m/romstage.c @@ -21,6 +21,7 @@ #include <stdint.h> #include <string.h> +#include <lib.h> #include <arch/io.h> #include <arch/romcc_io.h> #include <device/pci_def.h> @@ -35,21 +36,17 @@ #include <console/console.h> #include <cpu/x86/bist.h> -#if CONFIG_USBDEBUG -#include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" -#include "pc80/usbdebug_serial.c" -#endif - -#include "lib/ramtest.c" -#include "southbridge/intel/i82801gx/i82801gx_early_smbus.c" #include "superio/winbond/w83627thg/w83627thg_early_serial.c" -#include "northbridge/intel/i945/udelay.c" +void enable_smbus(void); #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1) +#include "northbridge/intel/i945/i945.h" +#include "northbridge/intel/i945/raminit.h" #include "southbridge/intel/i82801gx/i82801gx.h" -static void setup_ich7_gpios(void) + +void setup_ich7_gpios(void) { printk(BIOS_DEBUG, " GPIOS..."); /* General Registers */ @@ -65,18 +62,6 @@ static void setup_ich7_gpios(void) outl(0x00010035, DEFAULT_GPIOBASE + 0x38); /* GP_LVL */ } -#include "northbridge/intel/i945/early_init.c" - -static inline int spd_read_byte(unsigned device, unsigned address) -{ - return smbus_read_byte(device, address); -} - -#include "northbridge/intel/i945/raminit.h" -#include "northbridge/intel/i945/raminit.c" -#include "northbridge/intel/i945/errata.c" -#include "northbridge/intel/i945/debug.c" - static void ich7_enable_lpc(void) { // Enable Serial IRQ |