Since some people disapprove of white space cleanups mixed in regular commits

while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

15 files changed, 57 insertions, 57 deletions

diff --git a/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl b/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl
index a6043867b9..e466658dd4 100644
--- a/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl
+++ b/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl
@@ -17,7 +17,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-/* This is board specific information: IRQ routing for the 
+/* This is board specific information: IRQ routing for the
  * i945
  */
 
diff --git a/src/mainboard/kontron/986lcd-m/acpi/ich7_pci_irqs.asl b/src/mainboard/kontron/986lcd-m/acpi/ich7_pci_irqs.asl
index e86df0f973..c108d3f5b2 100644
--- a/src/mainboard/kontron/986lcd-m/acpi/ich7_pci_irqs.asl
+++ b/src/mainboard/kontron/986lcd-m/acpi/ich7_pci_irqs.asl
@@ -17,7 +17,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-/* This is board specific information: IRQ routing for the 
+/* This is board specific information: IRQ routing for the
  * 0:1e.0 PCI bridge of the ICH7
  */
 
diff --git a/src/mainboard/kontron/986lcd-m/acpi/platform.asl b/src/mainboard/kontron/986lcd-m/acpi/platform.asl
index 39faa5d729..2e4223c19c 100644
--- a/src/mainboard/kontron/986lcd-m/acpi/platform.asl
+++ b/src/mainboard/kontron/986lcd-m/acpi/platform.asl
@@ -42,9 +42,9 @@ Method(TRAP, 1, Serialized)
 	Return (SMIF)		// Return value of SMI handler
 }
 
-/* The _PIC method is called by the OS to choose between interrupt 
+/* The _PIC method is called by the OS to choose between interrupt
  * routing via the i8259 interrupt controller or the APIC.
- * 
+ *
  * _PIC is called with a parameter of 0 for i8259 configuration and
  * with a parameter of 1 for Local Apic/IOAPIC configuration.
  */
@@ -74,12 +74,12 @@ Method(_WAK,1)
 	// Notify PCI Express slots in case a card
 	// was inserted while a sleep state was active.
 
-	// Are we going to S3? 
+	// Are we going to S3?
 	If (LEqual(Arg0, 3)) {
 		// ..
 	}
 
-	// Are we going to S4? 
+	// Are we going to S4?
 	If (LEqual(Arg0, 4)) {
 		// ..
 	}
diff --git a/src/mainboard/kontron/986lcd-m/acpi/thermal.asl b/src/mainboard/kontron/986lcd-m/acpi/thermal.asl
index ad653bc5fc..d1774d4756 100644
--- a/src/mainboard/kontron/986lcd-m/acpi/thermal.asl
+++ b/src/mainboard/kontron/986lcd-m/acpi/thermal.asl
@@ -25,7 +25,7 @@ Scope (\_TZ)
 	{
 
 		// FIXME these could/should be read from the
-		// GNVS area, so they can be controlled by 
+		// GNVS area, so they can be controlled by
 		// coreboot
 		Name(TC1V, 0x04)
 		Name(TC2V, 0x03)
diff --git a/src/mainboard/kontron/986lcd-m/acpi_tables.c b/src/mainboard/kontron/986lcd-m/acpi_tables.c
index 55f02b10c2..6adff9f56b 100644
--- a/src/mainboard/kontron/986lcd-m/acpi_tables.c
+++ b/src/mainboard/kontron/986lcd-m/acpi_tables.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
diff --git a/src/mainboard/kontron/986lcd-m/chip.h b/src/mainboard/kontron/986lcd-m/chip.h
index 9d7e5968e1..800384aca4 100644
--- a/src/mainboard/kontron/986lcd-m/chip.h
+++ b/src/mainboard/kontron/986lcd-m/chip.h
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
diff --git a/src/mainboard/kontron/986lcd-m/cmos.layout b/src/mainboard/kontron/986lcd-m/cmos.layout
index 18867e514d..2217cb365a 100644
--- a/src/mainboard/kontron/986lcd-m/cmos.layout
+++ b/src/mainboard/kontron/986lcd-m/cmos.layout
@@ -102,7 +102,7 @@ entries
 968          1       e       2        ethernet1
 969          1       e       2        ethernet2
 970          1       e       2        ethernet3
- 
+
 #971          13       r       0        unused
 
 # coreboot config options: check sums
diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb
index f1f771ad72..f4e6b9318a 100644
--- a/src/mainboard/kontron/986lcd-m/devicetree.cb
+++ b/src/mainboard/kontron/986lcd-m/devicetree.cb
@@ -6,7 +6,7 @@ chip northbridge/intel/i945
                 end
         end
 
-        device pci_domain 0 on 
+        device pci_domain 0 on
                 device pci 00.0 on end # host bridge
 		device pci 01.0 off end # i945 PCIe root port
 		device pci 02.0 on end # vga controller
@@ -46,7 +46,7 @@ chip northbridge/intel/i945
                 	device pci 1d.3 on end # USB UHCI
                 	device pci 1d.7 on end # USB2 EHCI
                 	device pci 1e.0 on end # PCI bridge
-			#device pci 1e.2 off end # AC'97 Audio 
+			#device pci 1e.2 off end # AC'97 Audio
 			#device pci 1e.3 off end # AC'97 Modem
                         device pci 1f.0 on # LPC bridge
                                 chip superio/winbond/w83627thg
diff --git a/src/mainboard/kontron/986lcd-m/dsdt.asl b/src/mainboard/kontron/986lcd-m/dsdt.asl
index 653cd5b266..f06b225fe0 100644
--- a/src/mainboard/kontron/986lcd-m/dsdt.asl
+++ b/src/mainboard/kontron/986lcd-m/dsdt.asl
@@ -34,7 +34,7 @@ DefinitionBlock(
 
 	// General Purpose Events
 	//#include "acpi/gpe.asl"
-	
+
 	//#include "acpi/thermal.asl"
 
 	Scope (\_SB) {
diff --git a/src/mainboard/kontron/986lcd-m/mainboard.c b/src/mainboard/kontron/986lcd-m/mainboard.c
index c7f2ee00e4..28d6de18e1 100644
--- a/src/mainboard/kontron/986lcd-m/mainboard.c
+++ b/src/mainboard/kontron/986lcd-m/mainboard.c
@@ -104,7 +104,7 @@ struct fan_speed {
 	u16 fan_speed;
 };
 
-// FANIN Target Speed Register 
+// FANIN Target Speed Register
 // FANIN = 337500 / RPM
 struct fan_speed fan_speeds[] = {
 	{ 0x3c, 5625 }, { 0x41, 5192 }, { 0x47, 4753 }, { 0x4e, 4326 },
@@ -119,7 +119,7 @@ struct temperature {
 };
 
 struct temperature temperatures[] = {
-	{ 30,  86 }, { 33,  91 }, { 36,  96 }, { 39, 102 }, 
+	{ 30,  86 }, { 33,  91 }, { 36,  96 }, { 39, 102 },
 	{ 42, 107 }, { 45, 113 }, { 48, 118 }, { 51, 123 },
 	{ 54, 129 }, { 57, 134 }, { 60, 140 }, { 63, 145 },
 	{ 66, 150 }, { 69, 156 }, { 72, 161 }, { 75, 167 }
@@ -144,7 +144,7 @@ static void hwm_setup(void)
 		sysfan_speed = FAN_SPEED_5625;
 	//if (get_option(&sysfan_temperature, "sysfan_temperature") < 0)
 	//	sysfan_temperature = FAN_TEMPERATURE_30DEGC;
-	
+
 	// hwm_write(0x31, 0x20); // AVCC high limit
 	// hwm_write(0x34, 0x06); // VIN2 low limit
 
@@ -223,10 +223,10 @@ static void verb_setup(void)
 	cim_verb_data_size = 0;
 }
 
-// mainboard_enable is executed as first thing after 
+// mainboard_enable is executed as first thing after
 // enumerate_buses().
 
-static void mainboard_enable(device_t dev) 
+static void mainboard_enable(device_t dev)
 {
 #if CONFIG_PCI_OPTION_ROM_RUN_YABEL
 	/* Install custom int15 handler for VGA OPROM */
diff --git a/src/mainboard/kontron/986lcd-m/mainboard_smi.c b/src/mainboard/kontron/986lcd-m/mainboard_smi.c
index 6e4b5ad8d1..1aac802f2e 100644
--- a/src/mainboard/kontron/986lcd-m/mainboard_smi.c
+++ b/src/mainboard/kontron/986lcd-m/mainboard_smi.c
@@ -23,7 +23,7 @@
 #include <cpu/x86/smm.h>
 #include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
 
-/* The southbridge SMI handler checks whether gnvs has a 
+/* The southbridge SMI handler checks whether gnvs has a
  * valid pointer before calling the trap handler
  */
 extern global_nvs_t *gnvs;
diff --git a/src/mainboard/kontron/986lcd-m/mptable.c b/src/mainboard/kontron/986lcd-m/mptable.c
index dbf36bd51c..28c506f132 100644
--- a/src/mainboard/kontron/986lcd-m/mptable.c
+++ b/src/mainboard/kontron/986lcd-m/mptable.c
@@ -90,7 +90,7 @@ static void *smp_write_config_table(void *v)
 
 	/* Legacy Interrupts */
 
-	/* I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */	
+	/* I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */
 	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, ioapic_id, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x1, ioapic_id, 0x1);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, ioapic_id, 0x2);
@@ -158,11 +158,11 @@ static void *smp_write_config_table(void *v)
 	return smp_next_mpe_entry(mc);
 }
 
-/* MP table generation in coreboot is not very well designed; 
- * One of the issues is that it knows nothing about Virtual 
+/* MP table generation in coreboot is not very well designed;
+ * One of the issues is that it knows nothing about Virtual
  * Wire mode, which everyone uses since a decade or so. This
  * function fixes up our floating table. This spares us doing
- * a half-baked fix of adding a new parameter to 200+ calls 
+ * a half-baked fix of adding a new parameter to 200+ calls
  * to smp_write_floating_table()
  */
 static void fixup_virtual_wire(void *v)
diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c
index d29b23bde7..5c7724828e 100644
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2010 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
@@ -21,7 +21,7 @@
 
 /* Configuration of the i945 driver */
 #define CHIPSET_I945GM 1
-/* Usually system firmware turns off system memory clock signals to 
+/* Usually system firmware turns off system memory clock signals to
  * unused SO-DIMM slots to reduce EMI and power consumption.
  * However, the Kontron 986LCD-M does not like unused clock signals to
  * be disabled. If other similar mainboard occur, it would make sense
@@ -107,7 +107,7 @@ static void ich7_enable_lpc(void)
 	pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x88, 0x000403e9);
 	// COM4 decode
 	pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x8c, 0x000402e9);
-	// io 0x300 decode 
+	// io 0x300 decode
 	pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x90, 0x00000301);
 }
 
@@ -119,7 +119,7 @@ static void ich7_enable_lpc(void)
 static void early_superio_config_w83627thg(void)
 {
 	device_t dev;
-	
+
 	dev=PNP_DEV(0x2e, W83627THG_SP1);
 	pnp_enter_ext_func_mode(dev);
 
@@ -194,7 +194,7 @@ static void early_superio_config_w83627thg(void)
 	pnp_set_irq(dev, PNP_IDX_IRQ0, 11);
 	pnp_set_enable(dev, 1);
 
-	dev=PNP_DEV(0x4e, W83627THG_SP2); 
+	dev=PNP_DEV(0x4e, W83627THG_SP2);
 	pnp_set_logical_device(dev); // Set COM4 to sane non-conflicting values
 	pnp_set_enable(dev, 0);
 	pnp_set_iobase(dev, PNP_IDX_IO0, 0x2e8);
@@ -249,7 +249,7 @@ static void rcba_config(void)
 	 * would essentially disable all three ethernet ports of the mainboard.
 	 * It's possible to rename the ports to achieve compatibility to the
 	 * PCI spec but this will confuse all (static!) tables containing
-	 * interrupt routing information. 
+	 * interrupt routing information.
 	 * To avoid this, we enable (unused) port 6 and swap it with port 1
 	 * in the case that ethernet port 1 is disabled. Since no devices
 	 * are connected to that port, we don't have to worry about interrupt
@@ -413,7 +413,7 @@ void main(unsigned long bist)
 
 	/* Enable SPD ROMs and DDR-II DRAM */
 	enable_smbus();
-	
+
 #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
 	dump_spd_registers();
 #endif
@@ -423,8 +423,8 @@ void main(unsigned long bist)
 	/* Perform some initialization that must run before stage2 */
 	early_ich7_init();
 
-	/* This should probably go away. Until now it is required 
-	 * and mainboard specific 
+	/* This should probably go away. Until now it is required
+	 * and mainboard specific
 	 */
 	rcba_config();
 
@@ -470,7 +470,7 @@ void main(unsigned long bist)
 		 * memory completely, but that's a wonderful clean up task for another
 		 * day.
 		 */
-		if (resume_backup_memory) 
+		if (resume_backup_memory)
 			memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
 
 		/* Magic for S3 resume */
diff --git a/src/mainboard/kontron/986lcd-m/rtl8168.c b/src/mainboard/kontron/986lcd-m/rtl8168.c
index e278bcfb4e..04fd56ccb1 100644
--- a/src/mainboard/kontron/986lcd-m/rtl8168.c
+++ b/src/mainboard/kontron/986lcd-m/rtl8168.c
@@ -28,7 +28,7 @@
 static void nic_init(struct device *dev)
 {
 	printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
-	// Nothing to do yet, but this has to be here to keep 
+	// Nothing to do yet, but this has to be here to keep
 	// coreboot from trying to execute an option ROM.
 }
 
diff --git a/src/mainboard/kontron/kt690/acpi/routing.asl b/src/mainboard/kontron/kt690/acpi/routing.asl
index 4b6b111f05..2315120310 100644
--- a/src/mainboard/kontron/kt690/acpi/routing.asl
+++ b/src/mainboard/kontron/kt690/acpi/routing.asl
@@ -92,38 +92,38 @@ Scope(\_SB) {
 		/* Bus 0, Dev 0 - RS690 Host Controller */
 		/* Bus 0, Dev 1 - PCI Bridge for Internal Graphics */
 		/* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
-		Package(){ 0x0002FFFF, 0, 0, 18 }, 
-		Package(){ 0x0002FFFF, 1, 0, 19 }, 
-		Package(){ 0x0002FFFF, 2, 0, 16 }, 
-		Package(){ 0x0002FFFF, 3, 0, 17 }, 
+		Package(){ 0x0002FFFF, 0, 0, 18 },
+		Package(){ 0x0002FFFF, 1, 0, 19 },
+		Package(){ 0x0002FFFF, 2, 0, 16 },
+		Package(){ 0x0002FFFF, 3, 0, 17 },
 
 		/* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
-		Package(){ 0x0003FFFF, 0, 0, 19 }, 
-		Package(){ 0x0003FFFF, 1, 0, 16 }, 
-		Package(){ 0x0003FFFF, 2, 0, 17 }, 
-		Package(){ 0x0003FFFF, 3, 0, 18 }, 
-	
+		Package(){ 0x0003FFFF, 0, 0, 19 },
+		Package(){ 0x0003FFFF, 1, 0, 16 },
+		Package(){ 0x0003FFFF, 2, 0, 17 },
+		Package(){ 0x0003FFFF, 3, 0, 18 },
+
 		/* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
-		Package(){ 0x0004FFFF, 0, 0, 16 }, 
-		Package(){ 0x0004FFFF, 1, 0, 17 }, 
-		Package(){ 0x0004FFFF, 2, 0, 18 }, 
-		Package(){ 0x0004FFFF, 3, 0, 19 }, 
+		Package(){ 0x0004FFFF, 0, 0, 16 },
+		Package(){ 0x0004FFFF, 1, 0, 17 },
+		Package(){ 0x0004FFFF, 2, 0, 18 },
+		Package(){ 0x0004FFFF, 3, 0, 19 },
 
 		/* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
-		Package(){ 0x0005FFFF, 0, 0, 17 }, 
-		Package(){ 0x0005FFFF, 1, 0, 18 }, 
-		Package(){ 0x0005FFFF, 2, 0, 19 }, 
-		Package(){ 0x0005FFFF, 3, 0, 16 }, 
+		Package(){ 0x0005FFFF, 0, 0, 17 },
+		Package(){ 0x0005FFFF, 1, 0, 18 },
+		Package(){ 0x0005FFFF, 2, 0, 19 },
+		Package(){ 0x0005FFFF, 3, 0, 16 },
 
 		/* Bus 0, Dev 6 - General purpose PCIe bridge 6 */
-		Package(){ 0x0006FFFF, 0, 0, 18 }, 
-		Package(){ 0x0006FFFF, 1, 0, 19 }, 
-		Package(){ 0x0006FFFF, 2, 0, 16 }, 
-		Package(){ 0x0006FFFF, 3, 0, 17 }, 
+		Package(){ 0x0006FFFF, 0, 0, 18 },
+		Package(){ 0x0006FFFF, 1, 0, 19 },
+		Package(){ 0x0006FFFF, 2, 0, 16 },
+		Package(){ 0x0006FFFF, 3, 0, 17 },
 
 		/* Bus 0, Dev 7 - PCIe Bridge for network card */
-		Package(){ 0x0007FFFF, 0, 0, 19 }, 
-		Package(){ 0x0007FFFF, 1, 0, 16 }, 
+		Package(){ 0x0007FFFF, 0, 0, 19 },
+		Package(){ 0x0007FFFF, 1, 0, 16 },
 		Package(){ 0x0007FFFF, 2, 0, 17 },
 		Package(){ 0x0007FFFF, 3, 0, 18 },