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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-07-25 15:16:26 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-31 16:28:41 +0000 |
commit | 3754cda8353c7aca28a452b70a8dfb855cf5cfdc (patch) | |
tree | 207f9651b82fe6bc8592493725b8d8f75acdd523 /src/mainboard/lenovo/g505s/dsdt.asl | |
parent | 4e2294b429b7e4cd259cdd976673353757ac2b29 (diff) | |
download | coreboot-3754cda8353c7aca28a452b70a8dfb855cf5cfdc.tar.xz |
lenovo/g505s: Switch from f15rl to f15tn
Support code for Trinity and Richland is identical now.
I have also come across a unit with Trinity model CPU,
whose CPUID was not listed in f15rl while f15tn already
had support for f15rl.
Change-Id: Ia869429b75a9b308b4d4a84f16914ca629b1b1b5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20773
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/lenovo/g505s/dsdt.asl')
-rw-r--r-- | src/mainboard/lenovo/g505s/dsdt.asl | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/g505s/dsdt.asl b/src/mainboard/lenovo/g505s/dsdt.asl index 74b67f7c39..e486fef6fd 100644 --- a/src/mainboard/lenovo/g505s/dsdt.asl +++ b/src/mainboard/lenovo/g505s/dsdt.asl @@ -38,7 +38,7 @@ DefinitionBlock ( #include <southbridge/amd/agesa/hudson/acpi/pcie.asl> /* Describe the processor tree (\_PR) */ - #include <cpu/amd/agesa/family15rl/acpi/cpu.asl> + #include <cpu/amd/agesa/family15tn/acpi/cpu.asl> /* Describe the supported Sleep States for this Southbridge */ #include <southbridge/amd/common/acpi/sleepstates.asl> @@ -55,7 +55,7 @@ DefinitionBlock ( Device(PCI0) { /* Describe the AMD Northbridge */ - #include <northbridge/amd/agesa/family15rl/acpi/northbridge.asl> + #include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl> /* Describe the AMD Fusion Controller Hub Southbridge */ #include <southbridge/amd/agesa/hudson/acpi/fch.asl> |