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author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-12-05 04:25:44 +1100 |
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committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-12-06 07:39:26 +0100 |
commit | 14581fc632186ddaad10deb764dd9d87dec5284e (patch) | |
tree | 955627af469374c6efa9401ec5a995b2fda68822 /src/mainboard/lenovo/g505s/mptable.c | |
parent | e2b15d569a6e9461d4ecdafdbbbcadfa546012d6 (diff) | |
download | coreboot-14581fc632186ddaad10deb764dd9d87dec5284e.tar.xz |
mainboard/lenovo/g505s: Toggle on IOMMU support
Toggle on in devicetree.cb and build into AGESA by buildOpts.c.
Add ACPI and MPTABLES interrupt routers for IOMMU also.
Change-Id: Ia838f9b70f09ed1180daeb5382edc08c4b74946c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7643
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/mainboard/lenovo/g505s/mptable.c')
-rw-r--r-- | src/mainboard/lenovo/g505s/mptable.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/g505s/mptable.c b/src/mainboard/lenovo/g505s/mptable.c index f47b9d9495..65b1279e47 100644 --- a/src/mainboard/lenovo/g505s/mptable.c +++ b/src/mainboard/lenovo/g505s/mptable.c @@ -118,6 +118,12 @@ static void *smp_write_config_table(void *v) #define PCI_INT(bus, dev, int_sign, pin) \ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + /* IOMMU */ + PCI_INT(0x0, 0x00, 0x0, 0x10); + PCI_INT(0x0, 0x00, 0x1, 0x11); + PCI_INT(0x0, 0x00, 0x2, 0x12); + PCI_INT(0x0, 0x00, 0x3, 0x13); + /* Internal VGA */ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]); |