AGESA fam15tn boards: Clean up devicetree

Remove double nesting of chip northbridge/amd.
There is requirement to keep SPD address map in
the same chip block with device 0:18.2.

Change-Id: I67fcb59a63046865f660e628a61c2944b0f89a74
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30734
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: mikeb mikeb <mikebdp2@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 46 insertions, 47 deletions

diff --git a/src/mainboard/lenovo/g505s/devicetree.cb b/src/mainboard/lenovo/g505s/devicetree.cb
index 0b8f2676c3..99f42d6d58 100644
--- a/src/mainboard/lenovo/g505s/devicetree.cb
+++ b/src/mainboard/lenovo/g505s/devicetree.cb
@@ -22,55 +22,54 @@ chip northbridge/amd/agesa/family15tn/root_complex
 
 	device domain 0 on
 		subsystemid 0x1022 0x1410 inherit
-		chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
+		chip northbridge/amd/agesa/family15tn
+			device pci 0.0 on  end # Root Complex
+			device pci 0.2 on  end # IOMMU
+			device pci 1.0 on  end # Internal Graphics P2P bridge 0x99XX
+			device pci 1.1 on  end # Internal Multimedia
+			device pci 2.0 off end
+			device pci 3.0 off end
+			device pci 4.0 on  end # PCIE MINI0
+			device pci 5.0 on  end # PCIE MINI1
+			device pci 6.0 off end #
+			device pci 7.0 off end #
+			device pci 8.0 off end # NB/SB Link P2P bridge ?
+			device pci 9.0 off end #
+		end	#chip northbridge/amd/agesa/family15tn
 
-			chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
-				device pci 0.0 on  end # Root Complex
-				device pci 0.2 on  end # IOMMU
-				device pci 1.0 on  end # Internal Graphics P2P bridge 0x99XX
-				device pci 1.1 on  end # Internal Multimedia
-				device pci 2.0 off end
-				device pci 3.0 off end
-				device pci 4.0 on  end # PCIE MINI0
-				device pci 5.0 on  end # PCIE MINI1
-				device pci 6.0 off end #
-				device pci 7.0 off end #
-				device pci 8.0 off end # NB/SB Link P2P bridge ?
-				device pci 9.0 off end #
-			end	#chip northbridge/amd/agesa/family15tn # PCI side of HT root complex
-
-			chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus
-				device pci 10.0 on  end # FCH USB XHCI Controller HC0
-				device pci 11.0 on  end # FCH SATA Controller [AHCI mode]
-				device pci 12.0 on  end # FCH USB OHCI Controller
-				device pci 12.2 on  end # FCH USB EHCI Controller
-				device pci 13.0 on  end # FCH USB OHCI Controller
-				device pci 13.2 on  end # FCH USB EHCI Controller
-				device pci 14.0 on      # SMBUS
-					chip drivers/generic/generic #dimm 0
-						device i2c 50 on end # 7-bit SPD address
-					end
-					chip drivers/generic/generic #dimm 1
-						device i2c 51 on end # 7-bit SPD address
-					end
-				end # SM
-				device pci 14.2 on  end # FCH Azalia Controller
-				device pci 14.3 on      # FCH LPC Bridge [1022:780e]
-					chip ec/compal/ene932
-						# 60/64 KBC
-						device pnp ff.1 on end # dummy address
-					end
+		chip southbridge/amd/agesa/hudson
+			device pci 10.0 on  end # FCH USB XHCI Controller HC0
+			device pci 11.0 on  end # FCH SATA Controller [AHCI mode]
+			device pci 12.0 on  end # FCH USB OHCI Controller
+			device pci 12.2 on  end # FCH USB EHCI Controller
+			device pci 13.0 on  end # FCH USB OHCI Controller
+			device pci 13.2 on  end # FCH USB EHCI Controller
+			device pci 14.0 on      # SMBUS
+				chip drivers/generic/generic #dimm 0
+					device i2c 50 on end # 7-bit SPD address
+				end
+				chip drivers/generic/generic #dimm 1
+					device i2c 51 on end # 7-bit SPD address
 				end
-				device pci 14.4 on  end # FCH PCI Bridge [1022:780f]
-				device pci 14.5 off end # USB 2
-				device pci 14.6 off end # Gec
-				device pci 14.7 off end # SD
-				device pci 15.0 off end # PCIe 0
-				device pci 15.1 off end # PCIe 1
-				device pci 15.2 off end # PCIe 2
-				device pci 15.3 off end # PCIe 3
-			end	#chip southbridge/amd/agesa/hudson
+			end # SM
+			device pci 14.2 on  end # FCH Azalia Controller
+			device pci 14.3 on      # FCH LPC Bridge [1022:780e]
+				chip ec/compal/ene932
+					# 60/64 KBC
+					device pnp ff.1 on end # dummy address
+				end
+			end
+			device pci 14.4 on  end # FCH PCI Bridge [1022:780f]
+			device pci 14.5 off end # USB 2
+			device pci 14.6 off end # Gec
+			device pci 14.7 off end # SD
+			device pci 15.0 off end # PCIe 0
+			device pci 15.1 off end # PCIe 1
+			device pci 15.2 off end # PCIe 2
+			device pci 15.3 off end # PCIe 3
+		end	#chip southbridge/amd/agesa/hudson
 
+		chip northbridge/amd/agesa/family15tn
 			device pci 18.0 on end
 			device pci 18.1 on end
 			device pci 18.2 on end
@@ -83,7 +82,7 @@ chip northbridge/amd/agesa/family15tn/root_complex
 				{ {0xA0, 0x00}, {0xA2, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
 				{ {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 - 8-bit SPD addresses
 			}"
+		end
 
-		end	#chip northbridge/amd/agesa/family15tn # CPU side of HT root complex
 	end	#domain
 end	#chip northbridge/amd/agesa/family15tn/root_complex