mb/lenovo: Remove unnecessary whitespace in comments

This makes diff between boards even smaller in some cases.

Change-Id: I42ecaf5de657275708ddaf2c926fe31fe16a7220
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38515
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>

7 files changed, 16 insertions, 16 deletions

diff --git a/src/mainboard/lenovo/g505s/acpi/gpe.asl b/src/mainboard/lenovo/g505s/acpi/gpe.asl
index ace1d2692e..f28ad50207 100644
--- a/src/mainboard/lenovo/g505s/acpi/gpe.asl
+++ b/src/mainboard/lenovo/g505s/acpi/gpe.asl
@@ -15,18 +15,18 @@
 
 Scope(\_GPE) {	/* Start Scope GPE */
 
-	/*  Legacy PM event  */
+	/* Legacy PM event */
 	Method(_L08) {
 		/* DBGO("\\_GPE\\_L08\n") */
 	}
 
-	/*  Temp warning (TWarn) event  */
+	/* Temp warning (TWarn) event */
 	Method(_L09) {
 		/* DBGO("\\_GPE\\_L09\n") */
 		/* Notify (\_TZ.TZ00, 0x80) */
 	}
 
-	/*  USB controller PME#  */
+	/* USB controller PME# */
 	Method(_L0B) {
 		Store("USB PME", Debug)
 		/* Notify devices of wake event */
@@ -39,13 +39,13 @@ Scope(\_GPE) {	/* Start Scope GPE */
 		Notify(\_SB.PWRB, 0x02)
 	}
 
-	/*  ExtEvent0 SCI event  */
+	/* ExtEvent0 SCI event */
 	Method(_L10) {
 		/* DBGO("\\_GPE\\_L10\n") */
 	}
 
 
-	/*  ExtEvent1 SCI event  */
+	/* ExtEvent1 SCI event */
 	Method(_L11) {
 		/* DBGO("\\_GPE\\_L11\n") */
 	}
@@ -59,7 +59,7 @@ Scope(\_GPE) {	/* Start Scope GPE */
 		Notify(\_SB.LID, 0x80)
 	}
 
-	/*  GPIO0 or GEvent8 event  */
+	/* GPIO0 or GEvent8 event */
 	Method(_L18) {
 		Store("PCI bridge wake event", Debug)
 		/* Notify PCI bridges of wake event */
@@ -67,7 +67,7 @@ Scope(\_GPE) {	/* Start Scope GPE */
 		Notify(\_SB.PCI0.PBR5, 0x02)
 	}
 
-	/*  Azalia SCI event  */
+	/* Azalia SCI event */
 	Method(_L1B) {
 		/* DBGO("\\_GPE\\_L1B\n") */
 		Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
diff --git a/src/mainboard/lenovo/g505s/acpi/usb_oc.asl b/src/mainboard/lenovo/g505s/acpi/usb_oc.asl
index f5d6980d15..ae064feb1f 100644
--- a/src/mainboard/lenovo/g505s/acpi/usb_oc.asl
+++ b/src/mainboard/lenovo/g505s/acpi/usb_oc.asl
@@ -14,7 +14,7 @@
  * GNU General Public License for more details.
  */
 
-/* USB overcurrent mapping pins.   */
+/* USB overcurrent mapping pins. */
 Name(UOM0, 0)
 Name(UOM1, 2)
 Name(UOM2, 0)
diff --git a/src/mainboard/lenovo/g505s/buildOpts.c b/src/mainboard/lenovo/g505s/buildOpts.c
index 3adf20d99d..66cdefda67 100644
--- a/src/mainboard/lenovo/g505s/buildOpts.c
+++ b/src/mainboard/lenovo/g505s/buildOpts.c
@@ -30,7 +30,7 @@
 
 #include <vendorcode/amd/agesa/f15tn/AGESA.h>
 
-/*  Include the files that instantiate the configuration definitions.  */
+/* Include the files that instantiate the configuration definitions. */
 #include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
 #include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
 #include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
@@ -43,13 +43,13 @@
 #include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
 
 
-/*  Select the CPU family.  */
+/* Select the CPU family. */
 #define INSTALL_FAMILY_10_SUPPORT FALSE
 #define INSTALL_FAMILY_12_SUPPORT FALSE
 #define INSTALL_FAMILY_14_SUPPORT FALSE
 #define INSTALL_FAMILY_15_MODEL_1x_SUPPORT TRUE
 
-/*  Select the CPU socket type.  */
+/* Select the CPU socket type. */
 #define INSTALL_G34_SOCKET_SUPPORT  FALSE
 #define INSTALL_C32_SOCKET_SUPPORT  FALSE
 #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@@ -182,7 +182,7 @@
 //#define BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID   OEM_IGPU_HD_AUDIO_SSID
 //#define BLFCFG_APU_PCIE_PORTS_SUBSYSTEM_ID  OEM_APU_PCIE_PORTS_SSID
 
-/*  Process the options...
+/* Process the options...
  * This file include MUST occur AFTER the user option selection settings
  */
 /*
diff --git a/src/mainboard/lenovo/g505s/dsdt.asl b/src/mainboard/lenovo/g505s/dsdt.asl
index bc9a13f73a..ce11be8caa 100644
--- a/src/mainboard/lenovo/g505s/dsdt.asl
+++ b/src/mainboard/lenovo/g505s/dsdt.asl
@@ -66,7 +66,7 @@ DefinitionBlock (
 		/* Describe PCI INT[A-H] for the Southbridge */
 		#include <southbridge/amd/agesa/hudson/acpi/pci_int.asl>
 
-	}   /* End Scope(_SB)  */
+	}   /* End Scope(_SB) */
 
 	Scope(\_SB.PCI0.LIBR) {
 		#include "acpi/ec.asl"
diff --git a/src/mainboard/lenovo/g505s/ec.h b/src/mainboard/lenovo/g505s/ec.h
index 52a3ab71d8..63579b1bc4 100644
--- a/src/mainboard/lenovo/g505s/ec.h
+++ b/src/mainboard/lenovo/g505s/ec.h
@@ -21,4 +21,4 @@
 
 void lenovo_g505s_ec_init(void);
 
-#endif /* _MAINBOARD_LENOVO_G505S_EC_H   */
+#endif /* _MAINBOARD_LENOVO_G505S_EC_H */
diff --git a/src/mainboard/lenovo/g505s/mainboard.h b/src/mainboard/lenovo/g505s/mainboard.h
index 0a7ccd72dc..ebae80c8c4 100644
--- a/src/mainboard/lenovo/g505s/mainboard.h
+++ b/src/mainboard/lenovo/g505s/mainboard.h
@@ -38,4 +38,4 @@
 /* Enable PS/2 Keyboard and Mouse */
 #define SIO_EC_ENABLE_PS2K
 
-#endif /* _MAINBOARD_LENOVO_G505S_MAINBOARD_H   */
+#endif /* _MAINBOARD_LENOVO_G505S_MAINBOARD_H */
diff --git a/src/mainboard/lenovo/g505s/mptable.c b/src/mainboard/lenovo/g505s/mptable.c
index f3c2f0a572..3b2c4a2988 100644
--- a/src/mainboard/lenovo/g505s/mptable.c
+++ b/src/mainboard/lenovo/g505s/mptable.c
@@ -138,7 +138,7 @@ static void *smp_write_config_table(void *v)
 	PCI_INT(0x0, 0x11, 0x0, intr_data[0x40]);
 	PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]);
 
-	/* on board NIC & Slot PCIE.  */
+	/* on board NIC & Slot PCIE. */
 
 	/* PCI slots */
 	struct device *dev = pcidev_on_root(0x14, 4);