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authorPatrick Rudolph <siro@das-labor.org>2017-05-04 19:10:50 +0200
committerPatrick Rudolph <siro@das-labor.org>2017-05-21 16:39:30 +0200
commit93eac6a89d6aa4367436610a690c5aa0f040fc3a (patch)
tree946e77fa399a0e57553c2358561e81ebe069b2d0 /src/mainboard/lenovo/l520
parentc670a41ca717aefced613aa304da0e95ae4f2a27 (diff)
downloadcoreboot-93eac6a89d6aa4367436610a690c5aa0f040fc3a.tar.xz
mb/lenovo/*/romstage: Remove COM IO port
All those boards do not have a serial port. Don't attempt to decode the COMA/COMB IO range. Change-Id: Ide7e818f87e70e3f559d0769ccde89c35da961d6 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/19571 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/lenovo/l520')
-rw-r--r--src/mainboard/lenovo/l520/romstage.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/l520/romstage.c b/src/mainboard/lenovo/l520/romstage.c
index 6c93eedd79..84590ae5dc 100644
--- a/src/mainboard/lenovo/l520/romstage.c
+++ b/src/mainboard/lenovo/l520/romstage.c
@@ -25,12 +25,11 @@
void pch_enable_lpc(void)
{
- pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x3c0f);
+ pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x3c0c);
pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84, 0x007c1611);
pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x88, 0x00040069);
pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x8c, 0x000c0701);
pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x90, 0x00000000);
- pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0010);
}
void rcba_config(void)