summaryrefslogtreecommitdiff
path: root/src/mainboard/lenovo/s230u
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2019-06-16 23:36:28 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-10-16 14:08:29 +0000
commitd28d5071906e15c88939d889fbe40b117f5c303b (patch)
tree720d257987ba05695f2546b6fff0a180bde5b1b1 /src/mainboard/lenovo/s230u
parenta06689c7e7d88f74fd1d12f8f5055b5ea7bc741f (diff)
downloadcoreboot-d28d5071906e15c88939d889fbe40b117f5c303b.tar.xz
sb/intel/bd82x6x/lpc: Set up default LPC decode ranges
This sets up some common default LPC decode ranges in a common place. This may set up more decode ranges than needed but that typically does not hurt. Mainboards needing additional ranges can do so in the mainboard pch_enable_lpc hook. Change-Id: Ifeb5a862e56f415aa847d0118a33a31537ab8037 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33549 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/lenovo/s230u')
-rw-r--r--src/mainboard/lenovo/s230u/romstage.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/s230u/romstage.c b/src/mainboard/lenovo/s230u/romstage.c
index dd8fc17268..754c49aa4f 100644
--- a/src/mainboard/lenovo/s230u/romstage.c
+++ b/src/mainboard/lenovo/s230u/romstage.c
@@ -29,7 +29,6 @@
void pch_enable_lpc(void)
{
- pci_write_config16(PCH_LPC_DEV, LPC_EN, MC_LPC_EN | KBC_LPC_EN);
pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000);
/* Memory map KB9012 EC registers */