mainboards/lenovo: Copy X200 board to T400 for future expansion

Change-Id: If2d48b84fe7bd7b144e96171e54067891e3c4e2e
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/9316
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 145 insertions, 0 deletions

diff --git a/src/mainboard/lenovo/t400/cmos.layout b/src/mainboard/lenovo/t400/cmos.layout
new file mode 100644
index 0000000000..2dc91bf801
--- /dev/null
+++ b/src/mainboard/lenovo/t400/cmos.layout
@@ -0,0 +1,145 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2007-2008 coresystems GmbH
+#               2012 secunet Security Networks AG
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; version 2 of
+# the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc.
+#
+
+# -----------------------------------------------------------------
+entries
+
+# -----------------------------------------------------------------
+# Status Register A
+# -----------------------------------------------------------------
+# Status Register B
+# -----------------------------------------------------------------
+# Status Register C
+#96           4       r       0        status_c_rsvd
+#100          1       r       0        uf_flag
+#101          1       r       0        af_flag
+#102          1       r       0        pf_flag
+#103          1       r       0        irqf_flag
+# -----------------------------------------------------------------
+# Status Register D
+#104          7       r       0        status_d_rsvd
+#111          1       r       0        valid_cmos_ram
+# -----------------------------------------------------------------
+# Diagnostic Status Register
+#112          8       r       0        diag_rsvd1
+
+# -----------------------------------------------------------------
+0           120       r       0        reserved_memory
+#120        240       r       0        unused
+
+# -----------------------------------------------------------------
+# RTC_BOOT_BYTE (coreboot hardcoded)
+384           1       e       4        boot_option
+385           1       e       4        last_boot
+388           4       r       0        reboot_bits
+#390          2       r       0        unused?
+
+# -----------------------------------------------------------------
+# coreboot config options: console
+392           3       e       5        baud_rate
+395           4       e       6        debug_level
+#399          1       r       0        unused
+
+# coreboot config options: EC
+400         8       h       0        volume
+
+# coreboot config options: southbridge
+408         1       e       10        sata_mode
+409         2       e       7         power_on_after_fail
+
+# coreboot config options: EC
+411         1       e       9        first_battery
+412         1       e       1        bluetooth
+413         1       e       1        wwan
+414         1       e       1        wlan
+415         1       e       1        trackpoint
+416         1       e       1        fn_ctrl_swap
+417         1       e       1        sticky_fn
+
+# coreboot config options: bootloader
+418         512       s       0        boot_devices
+930           8       h       0        boot_default
+
+938         1       e       1        power_management_beeps
+939         1       e       1        low_battery_beep
+940         1       e       1        uwb
+
+# coreboot config options: northbridge
+941         3       e       11       gfx_uma_size
+
+#944          2       r       0        unused
+
+# coreboot config options: check sums
+984          16       h       0        check_sum
+#1000        24       r       0        unused
+
+# ram initialization internal data
+1024        128       r       0        read_training_results
+
+# -----------------------------------------------------------------
+
+enumerations
+
+#ID value   text
+1     0     Disable
+1     1     Enable
+2     0     Enable
+2     1     Disable
+4     0     Fallback
+4     1     Normal
+5     0     115200
+5     1     57600
+5     2     38400
+5     3     19200
+5     4     9600
+5     5     4800
+5     6     2400
+5     7     1200
+6     1     Emergency
+6     2     Alert
+6     3     Critical
+6     4     Error
+6     5     Warning
+6     6     Notice
+6     7     Info
+6     8     Debug
+6     9     Spew
+7     0     Disable
+7     1     Enable
+7     2     Keep
+8     0     No
+8     1     Yes
+9     0     Secondary
+9     1     Primary
+10    0     AHCI
+10    1     Compatible
+11    0     32M
+11    1     48M
+11    2     64M
+11    3     128M
+11    5     96M
+11    6     160M
+
+# -----------------------------------------------------------------
+checksums
+
+checksum 392 983 984
+