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author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-04-05 17:54:08 -0500 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-06-10 05:57:29 +0200 |
commit | 4b373c9de93d168770c8b212bcac377ffbfa0fe0 (patch) | |
tree | 879f10e400ce08521dbbd2a33a08e2f8ce142aa1 /src/mainboard/lenovo/t400/dsdt.asl | |
parent | a7eec529c7fdba308ef2d8a908c1dd9fdcf17d74 (diff) | |
download | coreboot-4b373c9de93d168770c8b212bcac377ffbfa0fe0.tar.xz |
mainboards/lenovo: Copy X200 board to T400 for future expansion
Change-Id: If2d48b84fe7bd7b144e96171e54067891e3c4e2e
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/9316
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/t400/dsdt.asl')
-rw-r--r-- | src/mainboard/lenovo/t400/dsdt.asl | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t400/dsdt.asl b/src/mainboard/lenovo/t400/dsdt.asl new file mode 100644 index 0000000000..5545c94420 --- /dev/null +++ b/src/mainboard/lenovo/t400/dsdt.asl @@ -0,0 +1,58 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#define THINKPAD_EC_GPE 17 +#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB +#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB +#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0 +#define DISPLAY_DEVICE_2_IS_LCD_SCREEN 1 + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x03, // DSDT revision: ACPI v3.0 + "COREv4", // OEM id + "COREBOOT", // OEM table id + 0x20090419 // OEM revision +) +{ + // Some generic macros + #include "acpi/platform.asl" + + // global NVS and variables + #include <southbridge/intel/i82801ix/acpi/globalnvs.asl> + + // General Purpose Events + #include "acpi/gpe.asl" + + Scope (\_SB) { + Device (PCI0) + { + #include <northbridge/intel/gm45/acpi/gm45.asl> + #include <southbridge/intel/i82801ix/acpi/ich9.asl> + } + } + + /* Chipset specific sleep states */ + #include <southbridge/intel/i82801ix/acpi/sleepstates.asl> + + /* Dock support code */ + #include "acpi/dock.asl" +} |