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authorArthur Heymans <arthur@aheymans.xyz>2016-10-27 00:36:02 +0200
committerMartin Roth <martinroth@google.com>2016-11-08 23:39:50 +0100
commit3cf2d9caf5055f0b21c20f67dfd70088ec0e4fee (patch)
tree34a1a313e42789716d88ff33a08b94f9033ddb50 /src/mainboard/lenovo/t400
parent306521b82ef522c1df876b229d462359e920d8ef (diff)
downloadcoreboot-3cf2d9caf5055f0b21c20f67dfd70088ec0e4fee.tar.xz
mb/lenovo/t400: use socket mPGA478MN instead of BGA945
The T400 features a socket P (mPGA478MN) and could potentially support model_6fx CPUs. Change-Id: I24f3356aa213c29011953daed31f46404e7a4d9d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17155 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/lenovo/t400')
-rw-r--r--src/mainboard/lenovo/t400/Kconfig2
-rw-r--r--src/mainboard/lenovo/t400/devicetree.cb2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/t400/Kconfig b/src/mainboard/lenovo/t400/Kconfig
index 194e38c779..47e7688418 100644
--- a/src/mainboard/lenovo/t400/Kconfig
+++ b/src/mainboard/lenovo/t400/Kconfig
@@ -3,7 +3,7 @@ if BOARD_LENOVO_T400 || BOARD_LENOVO_T500 || BOARD_LENOVO_R400
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select SYSTEM_TYPE_LAPTOP
- select CPU_INTEL_SOCKET_BGA956
+ select CPU_INTEL_SOCKET_MPGA478MN
select NORTHBRIDGE_INTEL_GM45
select SOUTHBRIDGE_INTEL_I82801IX
select EC_LENOVO_PMH7
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb
index 9940bb7eef..46cca1e23f 100644
--- a/src/mainboard/lenovo/t400/devicetree.cb
+++ b/src/mainboard/lenovo/t400/devicetree.cb
@@ -6,7 +6,7 @@ chip northbridge/intel/gm45
register "gfx.use_spread_spectrum_clock" = "1"
device cpu_cluster 0 on
- chip cpu/intel/socket_BGA956
+ chip cpu/intel/socket_mPGA478MN
device lapic 0 on end
end
chip cpu/intel/model_1067x