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authorArthur Heymans <arthur@aheymans.xyz>2018-09-16 15:58:36 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-09-28 10:17:23 +0000
commit4496a2e277736438013e21035b3996d621d3b931 (patch)
treeea47c924eab65a7a0b2f163da61c996437f96213 /src/mainboard/lenovo/t400
parent0a7b6202a577bebd0bf909c661805ffb636d2b9d (diff)
downloadcoreboot-4496a2e277736438013e21035b3996d621d3b931.tar.xz
mb/lenovo/t400: Link the gpio.c settings
Linking this file instead of including a header makes it possible to easily change gpio settings for a variant. Change-Id: Ifd496510d4868f5901a9dbbf7f1523ccffaf15ab Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/28628 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/t400')
-rw-r--r--src/mainboard/lenovo/t400/Makefile.inc1
-rw-r--r--src/mainboard/lenovo/t400/gpio.c (renamed from src/mainboard/lenovo/t400/gpio.h)7
-rw-r--r--src/mainboard/lenovo/t400/romstage.c4
3 files changed, 4 insertions, 8 deletions
diff --git a/src/mainboard/lenovo/t400/Makefile.inc b/src/mainboard/lenovo/t400/Makefile.inc
index 62e27d3e40..7721e0345f 100644
--- a/src/mainboard/lenovo/t400/Makefile.inc
+++ b/src/mainboard/lenovo/t400/Makefile.inc
@@ -13,6 +13,7 @@
## GNU General Public License for more details.
##
+romstage-y += gpio.c
romstage-y += dock.c
ramstage-y += dock.c
diff --git a/src/mainboard/lenovo/t400/gpio.h b/src/mainboard/lenovo/t400/gpio.c
index 261c912abd..ef340f28bf 100644
--- a/src/mainboard/lenovo/t400/gpio.h
+++ b/src/mainboard/lenovo/t400/gpio.c
@@ -11,9 +11,6 @@
* GNU General Public License for more details.
*/
-#ifndef LENOVO_T400_GPIO_H
-#define LENOVO_T400_GPIO_H
-
#include <southbridge/intel/common/gpio.h>
static const struct pch_gpio_set1 pch_gpio_set1_mode = {
@@ -115,7 +112,7 @@ static const struct pch_gpio_set2 pch_gpio_set2_level = {
.gpio49 = GPIO_LEVEL_HIGH,
};
-const struct pch_gpio_map t400_gpio_map = {
+const struct pch_gpio_map mainboard_gpio_map = {
.set1 = {
.mode = &pch_gpio_set1_mode,
.direction = &pch_gpio_set1_direction,
@@ -129,5 +126,3 @@ const struct pch_gpio_map t400_gpio_map = {
.level = &pch_gpio_set2_level,
},
};
-
-#endif
diff --git a/src/mainboard/lenovo/t400/romstage.c b/src/mainboard/lenovo/t400/romstage.c
index 1974ab6c7d..7bf14bff19 100644
--- a/src/mainboard/lenovo/t400/romstage.c
+++ b/src/mainboard/lenovo/t400/romstage.c
@@ -28,11 +28,11 @@
#include <romstage_handoff.h>
#include <console/console.h>
#include <southbridge/intel/i82801ix/i82801ix.h>
+#include <southbridge/intel/common/gpio.h>
#include <northbridge/intel/gm45/gm45.h>
#include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h>
#include <timestamp.h>
#include "dock.h"
-#include "gpio.h"
#define LPC_DEV PCI_DEV(0, 0x1f, 0)
#define MCH_DEV PCI_DEV(0, 0, 0)
@@ -93,7 +93,7 @@ void mainboard_romstage_entry(unsigned long bist)
gm45_early_reset();
}
- setup_pch_gpios(&t400_gpio_map);
+ setup_pch_gpios(&mainboard_gpio_map);
/* ASPM related setting, set early by original BIOS. */
DMIBAR16(0x204) &= ~(3 << 10);