diff options
author | Nicolas Reinecke <nr@das-labor.org> | 2015-07-04 23:37:06 +0200 |
---|---|---|
committer | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-15 06:47:48 +0000 |
commit | b165c4a46f003b396a2bbad9f9077f5d498ecbbf (patch) | |
tree | 1299ec9f5145a9db7f75a149a3147c9f1e4a737a /src/mainboard/lenovo/t410/vboot-rwa.fmd | |
parent | 465dd5c5241c5f682fb987c1c2ea0b47a28009fb (diff) | |
download | coreboot-b165c4a46f003b396a2bbad9f9077f5d498ecbbf.tar.xz |
mainboard/lenovo/t410: Add new port
The port is based on the x201 / t410s.
2537-vg5 / i5, no discrete gpu
Tested and working:
* Native raminit
* Native gfxinit
* Booting Seabios 1.12.1
* Booting from EHCI
* Running GNU/Linux 5.0.0
* No errors in dmesg
* EHCI debug on the devices left side, bottom-right
* Keyboard
* Fn keys (Mute, Volume, Mic)
* Touchpad
* TPM
* Wifi
* Sound
* USB
* Ethernet
* S3 resume
* VBOOT
Testing in progress.
Untested:
* VGA
* Displayport
* Docking station
Bugs:
* AC adapter can't be read from ACPI
* TPM not working with VBOOT and C_ENV BB
Details for flashing externally:
1. Disconnect all power
2. Connect the external flasher
3. Connect the power cord (This fixes internal power control)
4. Remove the power cord
Change-Id: Id9d872e643dd242e925bfb46d18076e6ad100995
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/11791
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/lenovo/t410/vboot-rwa.fmd')
-rw-r--r-- | src/mainboard/lenovo/t410/vboot-rwa.fmd | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t410/vboot-rwa.fmd b/src/mainboard/lenovo/t410/vboot-rwa.fmd new file mode 100644 index 0000000000..8f50d33fbb --- /dev/null +++ b/src/mainboard/lenovo/t410/vboot-rwa.fmd @@ -0,0 +1,31 @@ +FLASH@0xff800000 0x800000 { + SI_ALL@0x0 0x500000 { + SI_DESC@0x0 0x1000 + SI_GBE@0x1000 0x2000 + SI_ME@0x3000 0x4ed000 + } + SI_BIOS@0x500000 0x300000 { + RW_SECTION_A 0x180000 { + VBLOCK_A 0x10000 + FW_MAIN_A(CBFS) + RW_FWID_A 0x40 + } + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + RW_VPD(PRESERVE) 0x1000 + SMMSTORE(PRESERVE) 0x40000 + + WP_RO { + RO_VPD(PRESERVE) 0x1000 + RO_SECTION 0x11e000 { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } + } +} |