summaryrefslogtreecommitdiff
path: root/src/mainboard/lenovo/t420/devicetree.cb
diff options
context:
space:
mode:
authorIru Cai <mytbk920423@gmail.com>2016-05-06 23:05:28 +0800
committerMartin Roth <martinroth@google.com>2016-06-02 17:20:29 +0200
commit0bca3c914e2a336672988ab7d9f1b3d41f36b8a6 (patch)
treeaf79d336a73485c55f640bdfd90da70476c193d0 /src/mainboard/lenovo/t420/devicetree.cb
parentd52f2580e7b4b735d725d7d1e5a11a5ba93ced5c (diff)
downloadcoreboot-0bca3c914e2a336672988ab7d9f1b3d41f36b8a6.tar.xz
lenovo/t420: correct the eSATA port
The eSATA port of Lenovo T420 is port 3. I've checked it on an iGPU model and a dGPU model. Change-Id: I64bcc887140c1634dd1475d29e97780a5128d0be Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/14632 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Diffstat (limited to 'src/mainboard/lenovo/t420/devicetree.cb')
-rw-r--r--src/mainboard/lenovo/t420/devicetree.cb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/t420/devicetree.cb b/src/mainboard/lenovo/t420/devicetree.cb
index 65c567c18e..9f42cbb9b3 100644
--- a/src/mainboard/lenovo/t420/devicetree.cb
+++ b/src/mainboard/lenovo/t420/devicetree.cb
@@ -54,8 +54,8 @@ chip northbridge/intel/sandybridge
register "gpi1_routing" = "2"
register "gpi13_routing" = "2"
- # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 4 (dock) & 5 (eSATA)
- register "sata_port_map" = "0x37"
+ # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 3 (eSATA) & 4 (dock)
+ register "sata_port_map" = "0x1f"
# Set max SATA speed to 6.0 Gb/s
register "sata_interface_speed_support" = "0x3"