diff options
author | Peter Lemenkov <lemenkov@gmail.com> | 2019-11-27 23:04:49 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-09 09:49:24 +0000 |
commit | b8b9786ad4bc055c539c8aae88267b3f6c543c97 (patch) | |
tree | 1424ec795447707b866e2a25914832851ef4de50 /src/mainboard/lenovo/t430s/devicetree.cb | |
parent | 07b2fdb59413242030033d96495e903ce20e7ed2 (diff) | |
download | coreboot-b8b9786ad4bc055c539c8aae88267b3f6c543c97.tar.xz |
mb/lenovo/t430s/devicetree: Use subsystemid inheritance
Change-Id: Ifde5d382eb223bd996b9bb909c751e9d5f0a11e5
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37300
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/t430s/devicetree.cb')
-rw-r--r-- | src/mainboard/lenovo/t430s/devicetree.cb | 44 |
1 files changed, 12 insertions, 32 deletions
diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb index 0c2f668897..ee612cd95c 100644 --- a/src/mainboard/lenovo/t430s/devicetree.cb +++ b/src/mainboard/lenovo/t430s/devicetree.cb @@ -36,13 +36,11 @@ chip northbridge/intel/sandybridge register "pci_mmio_size" = "2048" device domain 0 on - device pci 00.0 on - subsystemid 0x17aa 0x21fb - end # host bridge + subsystemid 0x17aa 0x21fb inherit + + device pci 00.0 on end # host bridge device pci 01.0 on end # PCIe Bridge for discrete graphics - device pci 02.0 on - subsystemid 0x17aa 0x21fb - end # Integrated Graphics Controller + device pci 02.0 on end # Integrated Graphics Controller chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH # GPI routing @@ -76,9 +74,7 @@ chip northbridge/intel/sandybridge register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005" - device pci 14.0 on - subsystemid 0x17aa 0x21fb - end # USB 3.0 Controller + device pci 14.0 on end # USB 3.0 Controller device pci 16.0 off end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R @@ -86,18 +82,11 @@ chip northbridge/intel/sandybridge device pci 19.0 on subsystemid 0x17aa 0x21f3 end # Intel Gigabit Ethernet - device pci 1a.0 on - subsystemid 0x17aa 0x21fb - end # USB Enhanced Host Controller #2 - device pci 1b.0 on - subsystemid 0x17aa 0x21fb - end # High Definition Audio Controller + device pci 1a.0 on end # USB Enhanced Host Controller #2 + device pci 1b.0 on end # High Definition Audio Controller device pci 1c.0 off end # PCIe Port #1 - device pci 1c.1 on - subsystemid 0x17aa 0x21fb - end # PCIe Port #2 Integrated Wireless LAN + device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN device pci 1c.2 on - subsystemid 0x17aa 0x21fb smbios_slot_desc "7" "3" "ExpressCard Slot" "8" end # PCIe Port #3 ExpressCard device pci 1c.3 off end # PCIe Port #4 @@ -105,15 +94,11 @@ chip northbridge/intel/sandybridge device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe) device pci 1c.6 off end # PCIe Port #7 device pci 1c.7 off end # PCIe Port #8 - device pci 1d.0 on - subsystemid 0x17aa 0x21fb - end # USB Enhanced Host Controller #1 + device pci 1d.0 on end # USB Enhanced Host Controller #1 device pci 1e.0 off end # PCI bridge device pci 1f.0 on - subsystemid 0x17aa 0x21fb chip ec/lenovo/pmh7 - device pnp ff.1 on # dummy - end + device pnp ff.1 on end # dummy register "backlight_enable" = "0x01" register "dock_event_enable" = "0x01" end @@ -155,11 +140,8 @@ chip northbridge/intel/sandybridge register "evente_enable" = "0x0d" end end # LPC Controller - device pci 1f.2 on - subsystemid 0x17aa 0x21fb - end # 6 port SATA AHCI Controller + device pci 1f.2 on end # 6 port SATA AHCI Controller device pci 1f.3 on - subsystemid 0x17aa 0x21fb # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c device i2c 54 on end @@ -173,9 +155,7 @@ chip northbridge/intel/sandybridge end end # SMBus Controller device pci 1f.5 off end # SATA Controller 2 - device pci 1f.6 on - subsystemid 0x17aa 0x21fb - end # Thermal + device pci 1f.6 on end # Thermal end end end |