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| author | Nicolas Reinecke <nr@das-labor.org> | 2015-01-31 19:20:50 +0100 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-02-08 09:26:46 +0100 |
| commit | 29d358e6a1773205fb225f380e1a1d052912abfe (patch) | |
| tree | 7844f6b30120f1b7c08b7e962343b8d367e23450 /src/mainboard/lenovo/t430s/dsdt.asl | |
| parent | b5669ba57937f48ffe201395c3e3b1527c14d1fa (diff) | |
| download | coreboot-29d358e6a1773205fb225f380e1a1d052912abfe.tar.xz | |
lenovo/t430s: Add new port.
The port is based on the x230 / t530.
Tested - is in active use.
Change-Id: Ic5ccfe70343e8aef3465690edce9cdebf153a44d
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-on: http://review.coreboot.org/8359
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/mainboard/lenovo/t430s/dsdt.asl')
| -rw-r--r-- | src/mainboard/lenovo/t430s/dsdt.asl | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t430s/dsdt.asl b/src/mainboard/lenovo/t430s/dsdt.asl new file mode 100644 index 0000000000..85e2b4f9e0 --- /dev/null +++ b/src/mainboard/lenovo/t430s/dsdt.asl @@ -0,0 +1,56 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. + * Copyright (C) 2014 Vladimir Serbinenko + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#define THINKPAD_EC_GPE 17 +#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB +#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB +#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0 +#define EC_LENOVO_H8_ME_WORKAROUND 1 +#define HAVE_LCD_SCREEN 1 + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x02, // DSDT revision: ACPI v2.0 + "COREv4", // OEM id + "COREBOOT", // OEM table id + 0x20110725 // OEM revision +) +{ + // Some generic macros + #include "acpi/platform.asl" + + // global NVS and variables + #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> + + #include <cpu/intel/model_206ax/acpi/cpu.asl> + + Scope (\_SB) { + Device (PCI0) + { + #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> + #include <southbridge/intel/bd82x6x/acpi/pch.asl> + } + } + + /* Chipset specific sleep states */ + #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> +} |